MeiG Smart product technical information
SLM500
Hardware Design Guide
Page 21
52
MIPI_DSI0_CLK_M
AO
MIPI display serial interface 0 clock-
53
MIPI_DSI0_CLK_P
AO
MIPI display serial interface 0 clock+
54
MIPI_DSI0_LANE0_M
AI
MIPI display serial interface 0 lane0-
55
MIPI_DSI0_LANE0_P
AI
MIPI display serial interface 0 lane0+
56
MIPI_DSI0_LANE1_M
AI
MIPI display serial interface 0 lane1-
57
MIPI_DSI0_LANE1_P
AI
MIPI display serial interface 0 lane1+
58
MIPI_DSI0_LANE2_M
AI
MIPI display serial interface 0 lane2-
59
MIPI_DSI0_LANE2_P
AI
MIPI display serial interface 0 lane2+
60
MIPI_DSI0_LANE3_M
AI
MIPI display serial interface 0 lane3-
61
MIPI_DSI0_LANE3_P
AI
MIPI display serial interface 0 lane3+
62
GND
GND
GND
63
MIPI_CSI1_CLK_M
AI
MIPI camera serial interface 0 clock-
64
MIPI_CSI1_CLK_P
AI
MIPI camera serial interface 0 clock+
65
MIPI_CSI1_LANE0_M
AI
MIPI camera serial interface 0 lane0-
66
MIPI_CS1_LANE0_P
AI
MIPI camera serial interface 0 lane0+
67
MIPI_CSI1_LANE1_M
AI
MIPI camera serial interface 0 lane1-
68
GND
GND
GND
69
MIPI_CSI1_LANE3_M
AI
MIPI camera serial interface 1 lane3-
70
MIPI_CSI1_LANE3_P
AI
MIPI camera serial interface 1 lane3+
71
MIPI_CSI1_LANE2_M
AI
MIPI camera serial interface 1 lane2-
72
MIPI_CSI1_LANE2_P
AI
MIPI camera serial interface 1 lane2+
73
GPIO26_MCAM_MCLK0
GPIO26
B-PD:nppukp
Configurable I/O,main CAM MCLK
74
GPIO28_SCAM_MCLK2
GPIO28*
B-PD:nppukp
Configurable I/O,front CAM MCLK
75
GND
GND
GND
76
RF_WIFI/BT
AI
RF signal for WIFI/BT
77
GND
GND
GND
78
GPIO128_MCAM_RST_N
GPIO128*
B-PD:nppukp
Configurable I/O,main CAM RESET
79
GPIO126_MCAM_PWDN
GPIO126*
B-PD:nppukp
Configurable I/O,main CAM PWDN
80
GPIO129_SCAM_RST_N
GPIO129
B-PD:nppukp
Configurable I/O,front CAM RESET
81
GPIO125_SCAM_PWDN
GPIO125
B-PD:nppukp
Configurable I/O,front CAM PWDN
82
GPIO30_CAM_I2C_SCL0
GPIO30
B-PD:nppukp
Configurable I/O,Dedicated camera I2C0 SCL
83
GPIO29_CAM_I2C_SDA0
GPIO29
B-PD:nppukp
Configurable I/O,Dedicated camera I2C0 SDA
84
GND
GND
GND
85
GND
GND
GND
86
RF_MAIN
AI
RF signal for main ANT
87
GND
GND
GND