MeiG_SLM320_Hardware Design Manual
MeiG Smart Technology Co., Ltd
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Another level converter circuit is shown in the figure below. The input and output circuit design of the
following dotted line section can refer to the solid line section, but pay attention to the connection
direction. At the same time, this level conversion circuit is not suitable for applications with baud rate
over 460Kbps.
Figure 16 UART signal connection
Note: During design, it is recommended to reserve 0R resistance and parallel capacitor positions on the
main serial port and debug serial port circuit, which can be added to the baseplate to prevent RF
interference
3.10 Status indication
The status indicator pin is mainly used to drive the network status indicator. SLM320 module has net_
MODE
，
NET_ Status and status (reserved, default NC) are three network status pins. The following two
tables describe pin definitions and logic level changes in different network states.
Table 13 Description of network indicator pin
Pin Name
I/O
Pin
Describe
NET_MODE
O
5
Module status indication
NET_STATUS
O
6
Module status indication
STATUS
O
61
Reserved
