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MAX3421E Programming Guide
RCVDAVIRQ, RCVDAVIE
Meaning:
RCVDAVIRQ:
Receive FIFO Data Available Interrupt Request
RCVDAVIE:
Receive FIFO Data Available Interrupt Enable
Mode:
Host only
The SIE sets the RCVDAVIRQ bit when new peripheral data is in the RCVFIFO as a result of a
host IN request. After receiving this interrupt, the CPU clears the RCVDAVIRQ bit, reads the
byte count in the RCVBC register, and does successive reads to the RCVFIFO register (R1) to
retrieve the data. The SIE handles all retries (due to PID, CRC, data toggle, or timeout errors),
and only interrupts when it generates the ACK handshake to the peripheral.
The CPU sets and clears the RCVDAVIE bit. When RCVDAVIE = 1, the RCVDAVIRQ is
enabled as a source to activate the INT pin.
Programming Notes
1. The
CPU
must
clear this IRQ bit (by writing a 1 to it) before reading the RCVFIFO data.
2.
If any error occurs, the HXVRDNIRQ asserts, while the RCVDAVIRQ does not.