
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Note that this is identical to a BULK-OUT packet with no data and a fixed DATA1 PID. When
the SIE receives a handshake or bus timeout, it sets HXFRDNIRQ = 1 and indicates the results
in the HRSLT[3:0] bits (page
).
HS-IN
The host sends the IN handshake to terminate a CONTROL-WRITE request such as
Set_Address. To send an IN handshake packet, the CPU loads the HXFR register with the value
0x80 (
The SIE sends the IN PID, the address in PERADDR, endpoint zero, and a CRC5 value, then
waits 6.5 bit times for the peripheral to respond. Then the SIE updates the HRSLT bits and
asserts the HXFRDNIRQ bit. If the peripheral returns the DATA1 PID (with no data), the SIE
automatically sends an ACK handshake indicating successful termination of the CONTROL
transfer.
About ISO Transfers
USB ISOCHRONOUS transfers are characterized by on-time delivery without the handshakes
that accompany the other USB transfer types. Once a USB host enumerates a device and grants
its ISO bandwidth requirements (bandwidth indicates the number of bytes allocated to the ISO
endpoint in every 1-millisecond frame), the USB spec requires the host to deliver or consume
that number of bytes
every
frame.
This gives rise to special consideration for the MAX3421E, which may be connected to a slow
SPI interface or CPU. The controller must keep pace with the scheduling requirements. If there is
a speed mismatch, the MAX3421E has two ways to indicate the problem, as set by the
bit.
Double Buffering
The MAX3421E SNDFIFO and RCVFIFO are double-buffered, meaning that each has two sets
of 64-byte FIFOS and byte count registers. This double-buffering is essential for performing ISO
transfers larger than one maximum packet size of 64 bytes. The double-buffer feature is invisible
to the programmer:
•
INs:
If the CPU clears the RCVDAVIRQ (Receive Data Available IRQ) bit after
unloading the RCVFIFO, and if there is another packet of data waiting in the other
buffer, the SIE immediately re-asserts the RCVDAVIRQ bit.
•
OUTs:
If the CPU clears the SNDBAVIRQ (Send Buffer Available IRQ) by loading the
SNDBC register with the number of bytes which it loaded into the SNDFIFO, and if the
other buffer is available for loading, the SIE immediately re-asserts the SNDBAVIRQ
bit.
Although the SNDFIFO and RCVFIFO are 64 bytes, the SIE can send and receive ISO data
packets of any size (up to the USB spec limit of 1023 bytes) by concatenating data from
consecutive loads/reads of these FIFOS into one large data packet, as long as the CPU supplies
or consumes the data in time.