D R A F T — F O R I N
T E R N A L U S E O N L Y
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User Guide
CP3004-SA
3.2 System Wr ite Protection
The CP3004-SA provides write protection for non-volatile memories via the onboard configuration
resistors JMP2 (only available upon request), the uEFI Shell and the CompactPCI rear I/O connector
J2, pin B15 (RIO_SYS_WP#). If one of these sources is enabled, the system is write protected. Please
contact Kontron for further information before using these functions.
3.3 CP3004-SA-Specif ic Registers
Table 23: CP3004-SA-Specific Registers
ADDRESS
DEVICE
0x280
Status Register 0 (STAT0)
0x281
Status Register 1 (STAT1)
0x282
Control Register 0 (CTRL0)
0x283
Control Register 1 (CTRL1)
0x284
Write Protection Register (WPROT)
0x285
Reset Status Register (RSTAT)
0x286
Board Interrupt Configuration Register (BICFG)
0x287
Status Register 2 (STAT2)
0x288
Board ID High-Byte Register (BIDH)
0x289
Board and PLD Revision Register (BREV)
0x28A
Geographic Addressing Register (GEOAD)
0x28C
Watchdog Timer Control Register (WTIM)
0x28D
Board ID Low-Byte Register (BIDL)
0x290
LED Configuration Register (LCFG)
0x291
LED Control Register (LCTRL)
0x292
General Purpose Output Register (GPOUT)
0x293
General Purpose Input Register (GPIN)