STATus:OPERation:ENABle <
value
>
STATus:OPERation:ENABle?
Sets the value of the
for the
group. The enable register is a mask for enabling
specific bits from the Operation Event register to set the OPER (operation summary) bit of the Status Byte register.
The
command clears all enable register bits.
Parameter
Typical Return
Decimal sum of the bits in the register, default 0. For example, to enable bit 2 (value 4), bit 3 (value 8), and bit 7 (value
128), use decimal sum 140 (4 + 8 + 128). Default 0.
<
bit value
>
Enable bits 3 and 4 in the enable register: STAT:OPER:ENAB 24
– For example, with bit 3 (value 8) and bit 5 (value 32) set (and corresponding bits enabled), the query r40.
– A
does not clear the enable register, but does clear the
.
STATus:OPERation:NTRansition <
value
>
STATus:OPERation:NTRansition?
STATus:OPERation:PTRansition <
value
>
STATus:OPERation:PTRansition?
Sets and queries the value of the
(Negative-Transition) and
(Positive-Transition) registers. These registers
serve as a polarity filter between the Operation Condition and Operation Event registers.
When a bit in the NTR register is 1, then a 1-to-0 transition of the corresponding bit in the Operation Condition
register causes that bit in the Operation Event register to be set.
When a bit in the PTR register is 1, then a 0-to-1 transition of the corresponding bit in the Operation Condition
register causes that bit in the Operation Event register to be set.
The
command sets all bits in the PTR registers and clears all bits in the NTR registers.
Parameter
Typical Return
Decimal sum of the bits in the register, default 0. For example, to enable bit 2 (value 4), bit 3 (value 8), and bit 7 (value
128), use decimal sum 140 (4 + 8 + 128). Default 0.
<
bit value
>
Enable bits 3 and 4 in the NTR register: STAT:OPER:NTR 24
– If the same bits in both NTR and PTR registers are set to 1, then any transition of that bit at the Operation
Condition register sets the corresponding bit in the Operation Event register.
– If the same bits in both NTR and PTR registers are set to 0, then no transition of that bit at the Operation
Condition register can set the corresponding bit in the Operation Event register.
– The value returned is the binary-weighted sum of all bits set in the register.
Keysight AC6800 Series Operating and Service Guide
141
