BOP-1K 111315
B-31
B.116 STATus:OPERation[:EVENt] QUERY
STAT:OPER?
Syntax:
Short Form: STAT:OPER[:EVEN]?
Long Form: STATus:OPERation[:EVENt]?
Return Value:
<int_value>
Description:
Indicates changes in conditions monitored by Operational Event Register (see Table B-3).
Returns the value of the Operation Event register. The Operation Event register is a read-only register
which holds (latches) all events that occur. Reading the Operation Event register clears it. (See exam-
ple, Figure B-10.)
B.117 STATus:PRESet COMMAND
STAT:PRES
Syntax:
Short Form: STAT:PRES
Long Form: STATus:PRESet
Description:
Disables reporting of all status events.
This command sets the Operation Enabled Register (Table
B-3) to 8193 and the Questionable Register to 255.
(See example, Figure B-10.)
B.118 STATus:QUEStionable[:EVENt]? QUERY
STAT:QUES?
Syntax:
Short Form: STAT:QUES[EVEN]?
Long Form: STATus:QUEStionable[EVENT]?
Return Value:
<int_value> actual register value
Description:
Indicates the latched condition of the Questionable Event register.
Returns the value of the
Questionable Event register (see Table B-4). The Questionable Event register is a read-only register
which holds (latches) all events. Only bits 13 and 12 are latched in the Status Questionable Event reg-
ister. Bits 0 and 1 of the Status Questionable Condition Register are not latched in the power supply.
Reading the Questionable Event register clears it. (See example, Figure B-10.)
B.119 STATus:QUEStionable:CONDition? QUERY
STAT:QUES:COND?
Syntax:
Short Form: STAT:QUES:COND?
Long Form: STATus:QUEStionable:CONDition?
Return Value:
<int_value> actual register value
Description:
Returns the value of the Questionable Condition Register (see Table B-4).
The Questionable
Condition Register contains unlatched real-time information about questionable conditions of the
power supply.
Bit set to 1 = condition (active, true); bit reset to 0 = condition (inactive, false).
Bits 1 or
0 may be both be set, indicating the power supply is settling after a voltage change. (See example,
Figure B-10.)
B.120 STATus:QUEStionable:ENABle COMMAND
STAT:QUES:ENAB
Syntax:
Short Form: STAT:QUES:ENAB <int_value> Long Form: STATus:QUESionable:ENABle <int_value>
Description:
Programs Questionable Condition Enable Register (see Table B-4).
The Questionable Condition
Enable Register determines which conditions are allowed to set the Questionable Condition Register;
it is a mask for enabling
specific bits in the Questionable Event register that can cause the question-
able summary bit (bit 3) of the Status Byte register to be set. The questionable summary bit is the log-
ical OR of all the enabled bits in the Questionable Event register
.
Bit set to 1 = function enabled
(active, true); bit reset to 0 = function disabled (inactive, false)
.
(See example, Figure B-10.)
TABLE B-4. QUESTIONABLE EVENT REGISTER, QUESTIONABLE CONDITION REGISTER
AND QUESTIONABLE CONDITION ENABLE REGISTER BITS
CONDITION
NU
SINK
CE
VE
NU
SE
NU
TE
NU
CM
VM
BIT
15
14
13
12
11 - 7
6
5-4
3
2
1
0
VALUE
32,768
16,384
8192
4096
2048 - 128
64
32-16
8
4
2
1
CE
Current Error
CM
Current Mode Error
NU
Not Used
SE
Slave Error
SINK Power Supply absorbing energy from load
TE
Thermal Error
VE
Voltage Error
VM
Voltage Mode Error
Summary of Contents for BOP-MG 1KW
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Page 20: ...x BOP 1K 111315 FIGURE 1 1 HIGH POWER BOP SERIES POWER SUPPLY...
Page 39: ...BOP HIPWR 111315 1 19 1 20 Blank FIGURE 1 3 BOP OUTPUT CHARACTERISTICS...
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Page 56: ...2 16 BOP HIPWR 111315 FIGURE 2 5 PARALLEL CONFIGURATION LOCAL SENSING TYPICAL...
Page 57: ...BOP HIPWR 111315 2 17 FIGURE 2 6 PARALLEL CONFIGURATION REMOTE SENSING TYPICAL...
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