Komodo Fiber Reference Guide
24
C8
ddr3_2_dq[42]
AM22
1.35-V SSTL
C3
ddr3_2_dq[43]
AM20
1.35-V SSTL
D7
ddr3_2_dq[44]
AP22
1.35-V SSTL
A3
ddr3_2_dq[45]
AM19
1.35-V SSTL
A2
ddr3_2_dq[46]
AK21
1.35-V SSTL
B8
ddr3_2_dq[47]
AP21
1.35-V SSTL
F3
ddr3_2_dqs_p[2]
AK17
Differential 1.35-V SSTL
Data strobe P byte lane 0
G3
ddr3_2_dqs_n[2]
AK18
Differential 1.35-V SSTL
Data strobe N byte lane 0
C7
ddr3_2_dqs_p[5]
AN19
Differential 1.35-V SSTL
Data strobe P byte lane 1
B7
ddr3_2_dqs_n[5]
AP19
Differential 1.35-V SSTL
Data strobe N byte lane 1
DDR3 x16 (U22)
E7
ddr3_2_dm[3]
Y17
1.35-V SSTL
Write mask byte lane 0
D3
ddr3_2_dm[0]
AH22
1.35-V SSTL
Write mask byte lane 1
B8
ddr3_2_dq[0]
AF23
1.35-V SSTL
Data bus
A3
ddr3_2_dq[1]
AJ21
1.35-V SSTL
C3
ddr3_2_dq[2]
AH20
1.35-V SSTL
A7
ddr3_2_dq[3]
AG22
1.35-V SSTL
C8
ddr3_2_dq[4]
AF22
1.35-V SSTL
C2
ddr3_2_dq[5]
AK20
1.35-V SSTL
A2
ddr3_2_dq[6]
AJ20
1.35-V SSTL
D7
ddr3_2_dq[7]
AH23
1.35-V SSTL
G2
ddr3_2_dq[24]
AF18
1.35-V SSTL
H8
ddr3_2_dq[25]
W18
1.35-V SSTL
E3
ddr3_2_dq[26]
AF19
1.35-V SSTL
F2
ddr3_2_dq[27]
AG18
1.35-V SSTL
F7
ddr3_2_dq[28]
AA18
1.35-V SSTL
H7
ddr3_2_dq[29]
Y18
1.35-V SSTL
H3
ddr3_2_dq[30]
AE19
1.35-V SSTL
F8
ddr3_2_dq[31]
Y19
1.35-V SSTL
F3
ddr3_2_dqs_p[3]
AB18
Differential 1.35-V SSTL
Data strobe P byte lane 0
G3
ddr3_2_dqs_n[3]
AB19
Differential 1.35-V SSTL
Data strobe N byte lane 0
C7
ddr3_2_dqs_p[0]
AG21
Differential 1.35-V SSTL
Data strobe P byte lane 1
B7
ddr3_2_dqs_n[0]
AH21
Differential 1.35-V SSTL
Data strobe N byte lane 1
DDR3 x16 (U26)
E7
ddr3_2_dm[1]
Y21
1.35-V SSTL
Write mask byte lane 0
D3
ddr3_2_dm[6]
W22
1.35-V SSTL
Write mask byte lane 1
F8
ddr3_2_dq[8]
W20
1.35-V SSTL
Data bus
H3
ddr3_2_dq[9]
AE20
1.35-V SSTL
H8
ddr3_2_dq[10]
AA20
1.35-V SSTL
H7
ddr3_2_dq[11]
AB20
1.35-V SSTL
F2
ddr3_2_dq[12]
AF21
1.35-V SSTL
F7
ddr3_2_dq[13]
AA21
1.35-V SSTL
E3
ddr3_2_dq[14]
AD20
1.35-V SSTL
G2
ddr3_2_dq[15]
AF20
1.35-V SSTL
A2
ddr3_2_dq[48]
AD22
1.35-V SSTL
C2
ddr3_2_dq[49]
AE22
1.35-V SSTL
A3
ddr3_2_dq[50]
AC23
1.35-V SSTL
Board Components