REL1.0
Page 83 of 106
RZ/G1H Qseven Development Platform Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Table 29 8bit Camera Connector2 Pin Out (J14)
Pin
No
Pin Name
Signal Name
Signal Type /
Termination
Description
1
STROBE
NC
-
NC.
2
AGND
AGND
Power
Analog Ground.
3
I2C_SDA
MSIOF3_SS2(GP4_27)
IO, 2.8V OD/
10K PU
I2C1 Data.
4
AVDD
AVDD
O, 2.8V Power
Camera Analog Power Supply.
5
I2C_SCL
MSIOF3_SYNC(GP4_30
)
O, 2.8V OD/
10K PU
I2C1 Clock.
6
RESETB
PRESETOUT#
O, 2.8V CMOS
Reset Out, Active Low.
7
VSYNC
VI1_VSYNC#(GP1_25)
I, 2.8V CMOS
VIN1 Camera Vertical Synchronization.
8
PWDN
VI0_FIELD(GP0_15)
O, 3.3V CMOS/
10K PD
Active high Camera Power Down.
This pin is connected to GND in camera Add-
On Module to enable the camera always.
9
HSYNC
VI1_HSYNC#(GP1_24)
I, 2.8V CMOS
VIN1 Camera Horizontal Synchronization.
10
DVDD
DVDD
O, 1.8V Power
Digital Power Supply.
11
DOVDD
DOVDD
O, 2.8V Power
Camera IO Power Supply.
12
DATA9
VI1_B7/VI1_DATA7(GP
3_7)
I, 2.8V CMOS
VIN1 Camera Data7.
13
XCLK
MCLK_CAM2
O, 2.8V CMOS
Camera Reference Clock.
This pin is connected to On-board 26MHz
Oscillator.
14
DATA8
VI1_B6/VI1_DATA6(GP
3_6)
I, 2.8V CMOS
VIN1 Camera Data6.
15
DGND
DGND
Power
Digital Ground.
16
DATA7
VI1_B5/VI1_DATA5(GP
3_5)
I, 2.8V CMOS
VIN1 Camera Data5.
17
PCLK
VI1_CLK(GP3_15)
I, 2.8V CMOS
VIN1 Camera Pixel Clock.
18
DATA6
VI1_B4/VI1_DATA4(GP
3_4)
I, 2.8V CMOS
VIN1 Camera Data4.
19
DATA2
VI1_B0/VI1_DATA0(GP
3_0)
I, 2.8V CMOS
VIN1 Camera Data0.
20
DATA5
VI1_B3/VI1_DATA3(GP
3_3)
I, 2.8V CMOS
VIN1 Camera Data3.
21
DATA3
VI1_B1/VI1_DATA1(GP
3_1)
I, 2.8V CMOS
VIN1 Camera Data1
22
DATA4
VI1_B2/VI1_DATA2(GP
3_2)
I, 2.8V CMOS
VIN1 Camera Data2.
23
DATA1
NA
-
NC.
24
DATA0
NA
-
NC.
