REL1.0
Page 20 of 106
RZ/G1H Qseven Development Platform Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Pin
No.
Qseven MXM
Connector Pin
Name
Signal Name
Signal Type/
Termination
Description
60
SMB_CLK/
GP1_I2C_CLK
I2C0_SCL
I, 3.3V OD
I2C0 clock.
This pin is connected to PCIe Clock buffer,
PCIex4 connector, Mini PCIe connector and
Expansion Connector3 (J14) 77
th
Pin.
61
HDA_RST#/
I2S_RST#
GPIO_SSI_RST(GP1_2
9)
I, 3.3V CMOS/
10K PU
Audio Codec Reset.
This pin is connected to Capacitive Touch
Connector for touch reset & Expansion
connector3 (J14) 42
nd
Pin.
62
SMB_DAT/
GP1_I2C_DAT
I2C0_SDA
IO, 3.3V OD
I2C0 Data.
This pin is connected to PCIe Clock buffer,
PCIex4 connector, Mini PCIe connector and
Expansion Connector3 (J14) 79
th
Pin.
63
HDA_BCLK/
I2S_CLK
SSI_SCK34(GP4_8)
O, 3.3V CMOS
SSI Audio transmit clock.
This pin is connected from I2S audio codec.
64
SMB_ALERT#
NC
-
NC in RZ/G1H Qseven SOM.
This pin is connected to Expansion
connector3 (J14) 11
th
Pin in carrier board.
65
HDA_SDI/ I2S_SDI SSI_SDATA3(GP4_10) I, 3.3V CMOS
SSI Audio Transmit Data.
This pin is connected to I2S audio codec.
66
GP0_I2C_CLK
I2C2_SCL(GP4_0)
I, 3.3V OD
I2C2 clock.
This pin is connected to I2S Audio Codec,
Capacitive touch connector, Resistive touch
connector, and Expansion Connector3 (J14)
78
th
Pin.
67
HDA_SDO/
I2S_SDO
SSI_SDATA4(GP4_13) O, 3.3V CMOS
SSI Audio Receive Data.
This pin is connected from I2S audio codec.
68
GP0_I2C_DAT
I2C2_SDA(GP4_1)
IO, 3.3V OD
I2C2 Data.
This pin is connected to I2S Audio Codec,
Capacitive touch connector, Resistive touch
connector, and Expansion Connector3 (J14)
80
th
Pin.
69
THRM#
NC
-
NC in RZ/G1H Qseven SOM.
This pin is connected from Push button
(SW6) in carrier board.
70
WDTRIG#
NC
-
NC in RZ/G1H Qseven SOM.
This pin is connected to Expansion
connector3 (J14) 17
th
Pin in carrier board.
71
THRMTRIP#
GPIO_THRMTRIP_Q7
(GP4_11)
O, 3.3V CMOS
Thermal trip.
This pin is connected to indication LED D11
and Expansion connector3 (J14) 53
rd
Pin.
