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2. Getting Started
This chapter summarizes the information needed to make the ZT 5504 operational. This
chapter should be read before using the board.
Unpacking
Check the shipping carton for damage. If the shipping carton and contents are damaged, notify
the carrier and Intel for an insurance settlement. Retain the shipping carton and packing
material for inspection by the carrier. Obtain authorization before returning any product to Intel.
Refer to the "
Customer Support
" section for assistance information.
CAUTION:
This board must be protected from static discharge and physical shock. Never
remove any of the socketed parts except at a static-free workstation. Use the anti-static bag
shipped with the product to handle the board. Wear a wrist strap grounded through one of
the system's ESD Ground jacks when servicing system components.
System Requirements
The following topics briefly describe the basic system requirements and configurable features
of the ZT 5504. Links are provided to other chapters and appendices containing more detailed
information.
BIOS Version
For proper operation, the ZT 5504 must run Intel NetStructure Embedded BIOS v5.x, revision
C01 or P01 and later (P01-Pxx). The revision level is shown in the BIOS Identification string
displayed during the Power On Self Test (POST). The revision level is the fourth field in the
BIOS ID string. The
Intel NetStructure Embedded BIOS Manual
is available from Intel's Web
site.
Connectivity
The ZT 5504 can be installed as a System Master in the System Slot or as a stand-alone
computer in a peripheral slot. Refer to the "
Drone Mode
" topic for more information on using
the ZT 5504 as a stand-alone computer.
The ZT 5504 features an ejector handle that is keyed for compatible slots. The board can only
be inserted into slots fitted with a compatible mating key.
The ZT 5504 is designed to operate in a backplane providing CompactPCI form factor
interfaces at J1, J2, J3, and J5. The J1 and J2 connectors interface with the system's
CompactPCI bus. J3 signaling must comply with the PICMG* 2.16 Packet Switching Backplane
specification. The J5 interface must have through-pins for the ZT 5504 to interface with a rear
panel transition card such as the ZT 4807. See the "
Connectors
" topic in Appendix A for
connector descriptions.
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