Data Sheet
109
Rev. 1.00
2017-07-31
TLE9262BQXV33
Supervision Functions
Depending on the configuration, the
WD_FAIL
bits will be set after a watchdog trigger failure as follows:
•
In case an incorrect WD trigger is received (triggering in the closed watchdog window or when the watchdog
counter expires without a valid trigger) then the
WD_FAIL
bits will be increased (showing the number of
incorrect WD triggers)
•
For config 2: the bits can have the maximum value of ‘01’
•
For config 1, 3 and 4: the bits can have the maximum value of ‘10’
The
WD_FAIL
bits are cleared automatically when following conditions apply:
•
After a successful watchdog trigger
•
When the watchdog is OFF: in SBC Stop Mode after successfully disabling it, in SBC Sleep Mode, or in SBC
Fail-Safe Mode (except for a watchdog failure)
15.2.1
Time-Out Watchdog
The time-out watchdog is an easier and less secure watchdog than a window watchdog as the watchdog
trigger can be done at any time within the configured watchdog timer period.
A correct watchdog service immediately results in starting a new watchdog timer period. Taking the
tolerances of the internal oscillator into account leads to the safe trigger area as defined in
Figure 48
.
If the time-out watchdog period elapses, a watchdog reset is created by setting the reset output RO low and
the SBC switches to SBC Restart or SBC Fail-Safe Mode.
Figure 48 Time-out Watchdog Definition
open window
t /
[t
WD_TIMER
]
safe trigger area
Wd1_TimeOut_per.vsd
Watchdog Timer Period (WD_TIMER)
uncertainty
Typical timout watchdog trigger period
t
WD
x 1.80
t
WD
x 1.20
t
WD
x 1.50
