User’s Manual
1-9
05.99
Introduction
C513AO
RESET
9
10
4
I
RESET
A high level on this pin for the duration of two machine
cycles while the oscillator is running resets the device. An
internal diffused resistor to
V
SS
permits power-on reset
using only an external capacitor to
V
DD
.
XTAL2
18
20
14
O
XTAL2
Output of the inverting oscillator amplifier.
XTAL1
19
21
15
I
XTAL1
Input to the inverting oscillator amplifier and input to the
internal clock generator circuits.
To drive the device from an external clock source, XTAL1
should be driven, while XTAL2 is left unconnected.
There
are no requirements on the
duty
cycle of the external clock
signal, since the input to the internal clocking circuitry is
divided down by a divide-by-two flip-flop. Minimum and
maximum high and low times as well as rise/fall times
specified in the AC characteristics must be observed.
P2.0-
P2.7
21-28 24-31
18-25
I/O Port 2
Port 2 is a an 8-bit quasi-bidirectional I/O port with internal
pull-up arrangement. Port 2 pins that have “1”s written to
them are pulled high by the internal pull-up transistors, and
in that state can be used as inputs. As inputs, Port 2 pins
being externally pulled low will source current (
I
IL
, in the
DC characteristics) because of the internal pullup
transistors. Port 2 emits the high-order address byte during
fetches from external program memory and during
accesses to external data memory that use 16-bit
addresses (MOVX @DPTR). In this application it uses
strong internal pullup transistors when issuing “1”s. During
accesses to external data memory that use 8-bit
addresses (MOVX @Ri), Port 2 issues the contents of the
P2 Special Function Register and uses only the internal
pull-up transistors.
*)
I = Input
O = Output
Table 1-1
Pin Definitions and Functions (cont’d)
Symbol Pin Number
I/O
*)
Function
P-DIP-40
P-LCC-
4
4
P-MQ
F
P-44