User’s Manual
6-7
05.99
On-Chip Peripheral Components
C513AO
Port 0, in contrast to Ports 1, 2, and 3, is considered as “true” bidirectional, because the Port 0 pins
float when configured as inputs. Thus, this port differs in not having internal pull-ups. The pullup FET
in the P0 output driver (see Figure 6-6) is used only when the port is emitting “1”s during the
external memory accesses. Otherwise, the pull-up is always off. Consequently, P0 lines that are
used as output port lines are open drain lines. Writing a “1” to the port latch leaves both output FETs
off and the pin floats. In that condition, it can be used as high-impedance input. If port 0 is configured
as a general I/O port and has to emit logic high-level (1), external pull-ups are required.
Figure 6-6
Port 0 Circuitry
MCS02434
D
CLK
Bit
Latch
Control
Addr./Data
MUX
Pin
Read
Latch
Bus
Latch
Read
Pin
Write to
V
DD
Int.
&
Port
=1
Q
Q
