User’s Manual
6-15
05.99
On-Chip Peripheral Components
C513AO
6.2
Timers/Counters
The C513AO contains three 16-bit timers/counters which are useful in many applications.
In “timer” function, the register is incremented every machine cycle. Thus, one can think of it as
counting machine cycles. Since a machine cycle consists of twelve oscillator periods, the counter
rate is 1/12th of the oscillator frequency.
In “counter” function, the register is incremented in response to a 1-to-0 transition (falling edge) at
its corresponding external input pin, T0 or T1 (alternate functions of P3.4 and P3.5, respectively).
In this function, the external input is sampled during S5P2 of every machine cycle. When the
samples show a high level in one cycle and a low level in the next cycle, the count is incremented.
The new count value appears in the register during S3P1 of the cycle following the one in which the
transition was detected. It takes two machine cycles (24 oscillator periods) to recognize a 1-to-0
transition; therefore, the maximum count rate is 1/24th of the oscillator frequency. There are no
restrictions on the duty cycle of the external input signal; but, to ensure that a given level is sampled
at least once before it changes, it must be held for at least one full machine cycle.
6.2.1 Timer/Counter 0 and 1
Timer/Counter 0 and Timer/Counter 1 of the C513AO are fully compatible with Timer/Counter 0 and
Timer/Counter 1 of the C501 and can be used in the same four operating modes:
Mode 0: 8-bit timer/counter with a divide-by-32 prescaler
Mode 1: 16-bit timer/counter
Mode 2: 8-bit timer/counter with 8-bit auto-reload
Mode 3: Timer/Counter 0 is configured as one 8-bit timer/counter and one 8-bit timer
(In this mode, Timer/counter 1 holds its count. The effect is the same as setting TR1 = 0).
External inputs INT0 and INT1 can be programmed to function as a gate for Timer/Counters 0 and
1 to facilitate pulse-width measurements.
Each timer/counter consists of two 8-bit registers (TH0 and TL0 for Timer/Counter 0; TH1 and TL1
for Timer/Counter 1). They may be combined into one timer configuration depending on the mode
that is established. The functions of the timers are controlled by two special function registers,
TCON and TMOD.
In the following descriptions, TH0 and TL0 are used to specify the high-byte and the low-byte of
Timer 0; TH1 and TL1 are used to specify that of Timer 1. The operating modes are described and
shown for Timer 0, and apply also to Timer 1 if not explicitly noted.
