ICS SB586T User Manual Download

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SB586T Series

Product Manual

MANUAL NUMBER : 00431-220-5B

Summary of Contents for SB586T

Page 1: ...SB586T Series Product Manual MANUAL NUMBER 00431 220 5B...

Page 2: ...ovide immediate feedback online The information in this document is provided for reference only ICS Advent does not assume any liability arising out of the application or use of the information or pro...

Page 3: ...l other conditions below including those regarding neglect misuse and acts of God Within one year of purchase ICS Advent will repair or replace at our option any defective product At any time after on...

Page 4: ...ntainer has been lost or damaged new shipping containers may be obtained from ICS Advent Customer Service at a nominal cost Limitation of Liability In no event shall ICS Advent be liable for any defec...

Page 5: ...iousinjury Cautions and Warnings are accented with triangular symbols The excalmation symbol is used in all cautions and warnings to help alert you to the important instructions The lightning flash sy...

Page 6: ...Controller 1 3 Diskette Drive Controller 1 4 I O Ports 1 4 Watchdog Circuit 1 4 Ethernet Connector SB586TT 1 4 Universal Serial Bus SB586TU 1 4 Specifications 1 4 Products Covered by this Manual 1 8...

Page 7: ...and SVGA Video 2 10 Figure 2 5 SB586TT Ethernet and SVGA Video 2 11 Figure 2 6 SB586TU USB Port 2 12 Figure 3 1 68 to 50 Pin Adapter 3 2 Figure 3 2 Straight 8 Bit SCSI Chain 3 2 Figure 3 3 RAM Install...

Page 8: ...em BIOS The boards feature an external bus architecture that complies with the ISA standard and includes a PCI bus extension to communicate with onboard functions This extension supports the DEC PCI t...

Page 9: ...ly enabled or disabled through the system BIOS Unless indicated the following controllers are present in all models of the SB586T series Display Controller SB586T2V SB586TS2V and SB586TT The SVGA cont...

Page 10: ...able This cable allows full use of 16 bit wide bus transfers A 68 pin to 50 pin adapter is avail able to channel the SCSI bus signals to an 8 bit 50 pin connection for older SCSI peripherals Normal SC...

Page 11: ...the board which when set writes a 1 to I O address 351h data bit 0 When enabled software needs to toggle bit 0 at I O address 350h once every 650msec to prevent the timer from resetting the CPU The wa...

Page 12: ...Speed Required 70ns or faster Video Controller SB586T2V SB586TS2V and SB586TT SVGA Video Cirrus Logic CL GD5446 2MB DRAM installed VESA feature connector Rear panel DB 15 high density 15 pin connecto...

Page 13: ...PP and ECP enhanced port modes Speaker Keyboard Keylock and Reset Port Single 8 pin header connector for system interface Note The keyboard may be selected as absent or present by the system BIOS This...

Page 14: ...C Humidity 5 to 90 RHNC MTBF 90 000 P O H 25 C Power Requirements 1 6A 5V 100mA 12V Note The onboard 3 3 V is regulated down from the 5V source Agency Approvals FCC conformity with 47 CFR Part 15 Sub...

Page 15: ...586TS166 SB586TS166X SB586TS200 SB586TS200X SB586TS233X SB586TS266K SB586TS300K SB586T2V100 SB586T2V133 SB586T2V166 SB586T2V166X SB586T2V200X SB586T2V233X SB586T2V266K SB586T2V300K SB586TS2V100 SB586T...

Page 16: ...he layouts of the six models in the SB586T series Connectors Each model has several rear panel and onboard connectors Silkscreened numbers identify the connectors Square pads mark each pin 1 to preven...

Page 17: ...Amp 103308 6 The J4 connector allows the use of parallel devices typically printers Your SB586T will be delivered with this port already connected to a slot filler bracket for easier access 1 STROBE 1...

Page 18: ...ccess signal This connector has a 5V differential to activate any SCSI hard drive access LED used in the chassis 1 LED 2 LED J8 Secondary EIDE Hard Drive Port 40 pin dual row header Amp 103308 8 The J...

Page 19: ...K 25 GND 59 SCRST 26 GND 60 SCMSG 27 GND 61 SCSEL 28 GND 62 SCC D 29 GND 63 SCREQ 30 GND 64 SCI O J9 SCSI 3 Port continued 31 GND 65 SCD8 32 GND 66 SCD9 33 GND 67 SCD10 34 SCSIW 68 SCD11 J10 ISP Heade...

Page 20: ...tor is the second system Uni versal Serial Bus port Like J16 it typically provides connection for USB peripherals 1 FVCC1 3 FP1 2 FP1 4 FGND J12 Fan Power Connector 2 pin single row friction lock Mole...

Page 21: ...rate keyboard pinout at J19 1 KBDDATA 4 VCC fused 2 N C 5 KBDCLOCK 3 GND 6 N C Board Layouts Figures 2 1 through 2 6 illustrate the six models in the SB586T series Standard PICMG dimen sions are used...

Page 22: ...Chapter 2 Connectors and Layouts Manual Number 00431 220 5 Page 2 7 Figure 2 1 SB586T Base Model 8 3 8 3 60 3 60 60 60...

Page 23: ...Manual Number 00431 220 5 Page 2 8 S586T Series Manual Figure 2 2 SB586TS SCSI 3 8 3 8 3 60 3 60 60 60...

Page 24: ...Chapter 2 Connectors and Layouts Manual Number 00431 220 5 Page 2 9 Figure 2 3 SB586T2V SVGA Video 8 3 8 3 60 3 60 60 60...

Page 25: ...Manual Number 00431 220 5 Page 2 10 S586T Series Manual Figure 2 4 SB586TS2V SCSI 3 and SVGA Video 8 3 8 3 60 3 60 60 60...

Page 26: ...Chapter 2 Connectors and Layouts Manual Number 00431 220 5 Page 2 11 Figure 2 5 SB586TT Ethernet and SVGA Video 8 3 60 60 60 60 8 3 3...

Page 27: ...Manual Number 00431 220 5 Page 2 12 S586T Series Manual Figure 2 6 SB586TU USB Port 3 3 8 8 3 60 60 60 60...

Page 28: ...wo devices The diskette drive connector is J3 and it will also connect up to two devices The connectors are keyed so the cables will only connect in the correct direction SCSI Device Connection The SB...

Page 29: ...OH 0DOH PDOH DGDSWHU SLQ WR SLQ Figure 3 2 Straight 8 Bit SCSI Chain The SCSI controller is assigned SCSI ID 7 It is not permanently terminated and therefore may appear anywhere on the SCSI cable A SC...

Page 30: ...must be installed as a pair ICS Advent recommends that the SIMMS be of the same manufacturer and speed Note If you are installing DRAM you may use FPM or EDO RAM with or without parity While EDO SIMM...

Page 31: ...ands and applying equal pressure on each end of the module push the module forward until it clicks This locks the SIMM into position The pegs of the socket should be in the alignment holes of the SIMM...

Page 32: ...he new processor Otherwise your system may run more slowly than required or the processor may be damaged Refer to the sections on jumper settings and processor speed settings later in this chapter 6 R...

Page 33: ...Manual Number 00431 220 5 Page 3 6 SB586T Series Manual Figure 3 5 Component Locations 8 8 60 60 60 60 3 3 3...

Page 34: ...tchdog timer and set the bus speed for the CPU Figure 3 6 shows the location and functions of S1 This switch is discussed in more detail later in this chapter 21 2 1 2 7 2 1 1 7 1 7 2 7 0 5 5 3 6 6 2...

Page 35: ...vel on JP3 and the processor speed on S1 CAUTION To avoid damage to your single board computer when changing processors you must adjust the settings on both JP3 and S1 Figure 3 7 shows how to set the...

Page 36: ...stions about your new processor type or speed Table 3 1 S1 Base Fraction and JP3 Voltage Settings 6 3 3 16 0 17 2 2 2 23 1 23 1 23 1 23 1 6 25 7 23 1 21 2 2 23 1 23 1 23 1 23 1 6 25 7 23 1 21 21 2 23...

Page 37: ...evice must accept any interference received including interference that may cause undesired operation This equipment has been tested and found to comply with the limits for a Class A digital device pu...

Page 38: ...e following procedures involve working with a device that is sensitive to static electricity Use proper precautions to protect against electrostatic discharge ESD Only qualified personnel should attem...

Page 39: ...t least one IRQ must be allocated for each PCI device on the bus You can get an extra IRQ by disabling a jumper at JP1 However when you disable the jumper you will not be able to use a mouse with your...

Page 40: ...matically disabled when you choose the Fail Safe option in CMOS Setup B Check that S1 and JP3 are set correctly for the processor speed and voltage as discussed in Chapter 3 Returns If you need to ret...

Page 41: ...For PCI PnP ISA Systems With Flash ROM Support User s Guide Based on the Enhanced 7 15 95 Core AMIBIOS Version 6 30 TritonIIISA715 3 3 96 Copyright 1996 American Megatrends Inc All rights reserved Am...

Page 42: ...or full warranty details Limitations of Liability In no event shall American Megatrends be held liable for any loss expenses or damages of any kind whatsoever whether direct indirect incidental or con...

Page 43: ...t at 770 246 8645 Make sure you have the following information before calling Serial number and revision number of the BIOS System BIOS reference number A clear description of the problem Acknowledgme...

Page 44: ...Page A iv This page intentionally left blank...

Page 45: ...ter 1 Introduction A 1 Chapter 2 Standard CMOS Setup A 3 Hard Disk Drive Types A 5 Chapter 3 Advanced CMOS Setup A 7 Quick Boot A 7 Chapter 4 Advanced Chipset Setup A 12 Chapter 5 PCI PnP Setup A 15 C...

Page 46: ...Page A vi This page intentionally left blank...

Page 47: ...s AMIBIOS automatically detects the cache memory type and size DRAM Support EDO Extended Data Out FPM Fast Page Mode and ECC Error Correction Code DRAM memory is supported Flash ROM Support Flash ROM...

Page 48: ...ty in ROM that is accessed by pressing Del at the appropriate time during system boot Setup configures data in CMOS RAM The AMIBIOS Setup utility included in the AMIBIOS for the Intel Triton II ISA Ch...

Page 49: ...nsist of the safest set of parameters Use them if the system is behaving erratically They should always work but do not provide optimal system performance characteristics Date Time Select the Date Tim...

Page 50: ...ishes Yet each sector must still hold 512 bytes Write precompensation circuitry on the hard disk compensates for the physical difference in sector size by boosting the write current for sectors on inn...

Page 51: ...er or Sec Slave Choose the Type parameter and select CDROM You can boot the computer from a CD ROM drive Hard Disk Drive Types 7 SH OLQGHUV HDGV ULWH 3UHFRPSHQVDWLRQ DQGLQJ RQH 6HFWRUV DSDFLW 0 0 0 0...

Page 52: ...ManualNumber 00431 220 5 Page A 6 SB586T Series Manual This page intentionally left blank...

Page 53: ...If a READY signal is not received immediately AMIBIOS does not configure the drive AMIBIOS does not wait 5 seconds after sending a RESET signal to the IDE drive AMIBIOS does not check if the Del key...

Page 54: ...to back up the data The settings are ENABLED or DISABLED The optimal and fail safe default settings are ENABLED BootUp Num Lock Set this option to OFF to turn the Num Lock key off when the computer i...

Page 55: ...on this computer The settings are YES or NO The optimal and fail safe default settings are NO Wait for F1 If Error AMIBIOS POST runs system diagnostic tests that can generate a message followed by Pre...

Page 56: ...y segment to be written to and read from cache memory The settings are ENABLED or DISABLED The optimal default setting is ENABLED The fail safe default setting is DISABLED C000 16K Shadow C400 16K Sha...

Page 57: ...I adapter cards The settings are Setting Description DISABLED The specified ROM is not copied to RAM CACHE The contents of the ROM area are not only copied from ROM to RAM for faster execution the con...

Page 58: ...ings are ENABLED If you need to use IRQ12 for other hardware in the system you must disable the IRQ12 M mouse function and remove the JP1 jumper 8 Bit I O Recovery Time This option specifies the lengt...

Page 59: ...e default setting is 3 Leadoff Timing This option sets the leadoff timings The settings are 6 5 3 4 6 5 4 5 7 6 3 4 or 7 6 4 5 The optimal and fail safe default settings are 7 6 3 4 Speculative Leadof...

Page 60: ...EL2 ECC adds error scrubbing of correctable errors using operat ing system independent mechanisms such as SMIs system management interrupts The optimal and fail safe default settings are DISABLED PCI...

Page 61: ...example if there are two VGA devices in the computer one PCI and one ISA and the VGA Palette Snoop Bit Setting Action DISABLED Data read and written by the CPU is only directed to the PCI VGA device s...

Page 62: ...omputer you must also set the Offboard PCI IDE Primary IRQ and Offboard PCI IDE Secondary IRQ options Offboard PCI IDE Primary IRQ Offboard PCI IDE Secondary IRQ These options specify the PCI interrup...

Page 63: ...d PnP devices The settings are ISA EISA or PCI PNP The optimal and fail safe default settings for all IRQs are PCI PNP Reserved Memory Size This option specifies the size of the memory area reserved f...

Page 64: ...DISABLED The optimal and fail safe settings are AUTO Parallel Port Mode This setting sets up the mode of the parallel port The settings are NORMAL EPP or ECP The optimal and fail safe default setting...

Page 65: ...ndsafetyrequirementsandisinconformitywiththe relevantEUDirectiveslistedbelow EU EMC Directive 89 336 EEC EU Low Voltage Directive 73 23 EEC usingtherelevantsectionofthefollowingEUstandardsandothernorm...

Page 66: ...ent com techsupport http www icsadvent com AtourWebsiteyouwillfindanonlineformthatwillaskthefollowingtypesofquestions Your Name _______________________________________________________________ Company...

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