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• DSP SYSTEM CLOCK CIRCUIT
The 40 MHz reference signal is applied to the amplifier
(IC652) via the “40M” line, and is then applied to the
DDS IC (IC651, pin 7) as the system clock signal. The
signals which are output from pins 14–22 are applied
to the D/A convertor (R661–R671, R673–R681), and
then passes through the low-pass (L681, L682, C680
–C685) and high-pass (L683, C686–C688) filters
to suppress unwanted signals. The filtered signal is
amplified at the buffer amplifier (Q680), and passes
through the attenuator (R690–R692). The signal is
applied to the DSP IC for TX (DSP-TX board; IC1), RX-A
(DSP-A board; IC1) and RX-B (DSP-B board; IC1) as
12.288 MHz system clock signal via the A/D converters.
OSC unit
RXPLL-A unit
RXPLL-B unit
CAL
4
Reference oscillator
X1: 10 MHz
Q22
Q70
Q702
Q702
IC501
IC651
IC101
Q150
IC201
*VCO
Q303
Q301
Q302
IC101
Q150
IC201
*VCO
Q301
Q302
Q680
IC651
Q680
Q601
Q541
IC501
Q541
D821
Q831
Q591
ATT
D/A
ATT
ATT
DDS IC
0.491 MHz T3 LO signal
100 kHz Marker signal
R1 LO signal
T1 LO signal
64.491 MHz R2 LO signal
64 MHz T2 LO signal
PLL IC
DDS IC
DDS IC
4
ATT
D/A
ATT
ATT
DDS IC
12.288 MHz DACK signal
140 MHz SAD signal
100 kHz Marker signal
S1 LO signal
64.591 MHz S2 LO signal
PLL IC
DDS IC
DDS IC
Q303
• RXPLL-A/B CIRCUITS
*VCO is composed as below.
Q220: 64.485–72.454999 MHz
Q230: 72.455–79.454999 MHz
Q240: 79.455–86.454999 MHz
Q250: 86.455–94.454999 MHz
Q260: 94.455–109.454999 MHz
Q270: 109.455–109.455 MHz
*VCO is composed as below.
Q220: 64.585–72.554999 MHz
Q230: 72.555–79.554999 MHz
Q240: 79.555–86.554999 MHz
Q250: 86.555–94.554999 MHz
Q260: 94.555–109.554999 MHz
Q270: 109.555–109.555 MHz