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3-7 PORT ALLOCATIONS
3-7-1 MAIN CPU2 PORT ALLOCATIONS
(LOGIC UNIT; IC604)
5–9 H8_A0–A4
11–17 H8_A5–A11 Output address bus signals.
19, 20 H8–A12, A13
21
UNLKA
Input port for the PLL unlock signal
from the RXPLL-A unit.
22 UNLKB
Input port for the PLL unlock signal
from the RXPLL-B unit.
23
ECK
Outputs clock signal to the EEPROM.
24 EDT
I/O port for the data signal from/to the
EEPROM.
26 DSCLA
Outputs clock signal to the EEPROM
on the DIGISEL-A unit.
27 DSDAA
I/O port for the data signal from/to the
EEPROM on the DIGISEL-A unit.
28 DSCLB
Outputs clock signal to the EEPROM
on the DIGISEL-B unit.
29 DSDAB
I/O port for the data signal from/to the
EEPROM on the DIGISEL-B unit.
30
RTKI
Input port for the RTTY keying signal.
31 TRVI
Input port for the transverter control
signal from ACC jack on the rear
panel.
33 SDAT
Outputs data signals to the DDS, PLL
and DSP ICs on the SCOPE unit.
34 SST2
Outputs strobe signal to the PLL IC
on the SCOPE unit.
35 EXRL1
Outputs external SEND relay (lead
type) control signal.
High : The relay switches ON.
36 EXRL2
O u t p u t s ex t e r n a l S E N D r e l ay
(semiconductor type) control signal.
High : The relay switches ON.
42
PCK/CON0
Outputs clock signal to the RXPLL-A/
B ICs .
43
PDAT/CON1
Outputs data signal to the RXPLL-A/
B ICs.
46 PSLA
Outputs strobe select signal to the
PLL-A IC.
47 PSTA
Outputs strobe signal to the RXPLL-A
IC.
48 PSLB
Outputs strobe select signal to the
PLL-B IC.
49 PSTB
Outputs strobe signal to the RXPLL-B
IC.
51 MCK
Outputs clock signal to the ICs (other
than PLL, scope and DSP ICs).
52 DAT
Outputs data signal to the ICs (other
than PLL, scope and DSP ICs).
54
CTXD
Output port for the CI-V data.
55
CRXD/CBSY
Inp ut port for the CI-V data and CI-V
bus busy signals.
56
DSPCK Outputs clock signal to the DSP IC.
57
DSPR
Outputs data signal to the DSP IC.
58 ISTA
Outputs start signal to the internal
antenna tuner.
59 SST1
Outputs chip select signal to the DDS
IC on the SCOPE unit.
60 SPS0
Outputs profile select signal to the
DDS IC on the SCOPE unit.
61 SCK
Outputs clock signals to the DDS,
PLL and DSP ICs on the SCOPE
unit.
63–69, 71, H8_D0–
I/O port for data bus signals.
73–80 H8_D15
81 MUTI
Input port for the external mute
control signal.
High : Mute ON.
82 TXS
Outputs control signal to the TX
circuit power supply.
Low
:
While
transmitting.
83 NSQA
Input port for the noise pulse signal
from the RX-A circuit.
85 TRAS
Outputs control signal for transmisson
(other than PTT and the control
signal from ACC).
104 NSQB
Input port for the noise pulse signal
from the RX-B circuit.
105 RXSA
Outputs control signal to the RX-A
circuit power supply.
Low
:
While the RX-A circuit is
activated.
106 RXSB
Outputs control signal to the RX-B
circuit power supply.
Low
:
While the RX-B circuit is
activated.
107 SQSA
Outputs RX-A circuit squelch control
signal to the ACC jack.
High : RX LED lights ON.
108 SQSB
Outputs RX-B circuit squelch control
signal to the ACC jack.
High : RX LED lights ON.
109 SQLSM
Outputs AF mute control signal to the
MAIN RX circuit.
Low : Squelch is open.
110 SQLSS
Outputs AF mute control signal to the
SUB RX circuit.
Low : Squelch is open.
113
FORL
Input port for the “FOR” signal.
114
REFL
Input port for the “REF” signal.
115 ALCL
Input port for the ALC meter control
signal.
116 IDL
Input port for the ID meter control
signal.
117 VDL
Input port for the VD meter control
signal.
118
THML
Input port for the PA unit temperature
detect signal.
Pin
Port
Description
number
name
Pin
Port
Description
number
name