35
Plasma TV Service Manual
14/03/2005
12.27.2. Features
Third-generation, two-dimensional filtering techniques
Third-generation, advanced scaling techniques
Second-generation Automatic Image Optimization
Frame rate conversion
Video processing
On-Screen Display (OSD)
On-chip microprocessor
JTAG debugger and boundary scan
Picture-in-picture (PIP)
Multi-region, non-linear scaling
Hardware 2-wire serial bus support
12.27.3. Applications
Multimedia Displays
Plasma Displays
Digital Television
12.28. SIL151B
12.28.1. General Description
The
SiI 151B
receiver uses PanelLink Digital technology to support high-resolution displays up to SXGA
(25-112MHz). This receiver supports up to true color panels (24 bit/pixel, 16M colors) with both one and
two pixels per clock.
All PanelLink products are designed on a scaleable CMOS architecture, ensuring support for future
performance enhancements while maintaining the same logical interface. System designers can be
assured that the interface will be stable through a number of technology and performance generations.
PanelLink Digital technology simplifies PC and display interface design by resolving many of the system
level issues associated with high-speed mixed signal design, providing the system designer with a
digital interface solution that is quicker to market and lower in cost.
12.28.2. Features
Low Power Operation: 201mA max. current consumption at 3.3V core operation
Time staggered data output for reduced ground bounce and lower EMI
Sync Detect feature for Plug & Display iMHot Plugginglo
Cable Distance Support: over 5m with twisted-pair, fiber-optics ready
Compliant with DVI 1.0 (DVI is backwards compatible with VESA
®
P&D
TM
and DFP)
HSYNC de-jitter circuitry enables stable operation even when HSYNC contains jitter
Low power standby mode
Automatic entry into standby mode with clock detect circuitry
Standard and Pb-free packages
Summary of Contents for HPT-4205
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