24
After a simulation stop, execution may be resumed in one of two ways. If the cause of the stop has not been
remedied and the stop option has not been disabled, resuming execution with
CONTINUE
,
STEP
,
GO
, or
RUN
will
cause the stop to occur again. Alternately, specifying the
–B
switch with any of the preceding commands will
resume execution while bypassing the stop for the current instruction. Bypassing a stop has the following effect:
Option
Bypass Action
UNIMPL
Resume execution with the instruction ignored
UNDEF
Resume execution with the instruction decoded as in hardware
UNSC
Resume execution with the I/O instruction ignored
IOERR
Resume execution with the action as in hardware
In addition to these configurable stops, an unconditional simulation stop will occur if an indirect addressing chain
exceeds the maximum length specified by a
SET CPU INDIR=<limit>
command. HP computer family memory
addresses may be indirect to indicate that the values point to the target addresses rather than contain the target
addresses. The target of an indirect address may itself be indirect, and the CPU follows this chain of addresses
until it finds a direct address. Indirect addressing is typically only one or two levels deep, but if the chain loops back
on itself (e.g., if an indirect address points to itself), then instruction execution will be stopped. For example, these
commands:
DEPOSIT 0 LDA 1,I
DEPOSIT 1 100001
RUN 0
...will stop the simulator with an
Indirect address loop
message.
The limit may be set to any number of levels up to 32,768. This is the absolute maximum number of levels that can
be created without an infinite loop — each location in memory points to the next one except for the last, which
contains the target value. In practice, anything over a few levels likely represents a programming error. The
default setting is 16 levels.
3.1.3
Stop Messages
When the CPU executes a HLT instruction, simulated execution terminates, and control returns to the SCP prompt.
The contents of the T and P registers, and the halt instruction and the next instruction to execute are displayed.
For example:
Programmed halt, T: 102023 (HLT 23), P: 00101 (CLA,INA)
sim>
When the simulator stops for a user request or after reaching a breakpoint or completing a
STEP
command, the P-
register value and the next instruction to execute are displayed. For example:
Simulation stopped, P: 03306 (JMP 3311)
sim>
If an interrupt is pending, however, the instruction contained in the trap cell corresponding to the highest-priority
interrupting device will be displayed instead:
Simulation stopped, P: 03306 (IAK 11: JSB 1644,I)
sim>
This indicates that when simulation resumes, the device with select code 11 will receive the interrupt
acknowledgement, and JSB 1644,I will be executed. Note that P does not change when an interrupt occurs and a
trap cell instruction is executed.
