11
If the
–M
switch is specified, the value is displayed or accepted as a CPU machine instruction mnemonic if it is
defined and implemented in the currently enabled firmware set. If it is not, it is displayed as a numeric value in the
CPU's data radix or is rejected if depositing. Any numeric operands present are displayed or accepted in a default
radix unless overridden by the addition of one of these mutually exclusive format switches:
Switch
Format Interpretation
–A
A single character in the right-hand byte
–B
A binary value
–O
An octal value
–D
A decimal value
–H
A hexadecimal value
Operand values use a default radix suitable to the type of the value, as follows:
•
Operand memory addresses and I/O instruction select codes use the CPU’s address radix, which is octal.
•
Extended Arithmetic Unit instruction shift and rotate counts and I/O Processor instruction index
displacements use decimal unless overridden by a format switch on the command line.
•
I/O Processor and Scientific Instruction Set instruction operand data values use the CPU's data radix,
which defaults to octal but may be set to a different radix or overridden by a format switch on the command
line.
If the CPU data radix is set to hexadecimal, caution must be exercised when entering hex values without a leading
digit. A value that is the same as an instruction mnemonic will be interpreted as the latter. For example,
CCE
is an
instruction mnemonic, but
CCEE
is a hex value. To avoid confusion, always enter hex values with the
–H
switch or
with a leading zero (i.e.,
0CCE
).
Machine instruction entry uses the HP Assembler syntax, with the exceptions noted below. The set of recognized
mnemonics depends on the current machine configuration. Instructions not implemented by the current CPU
model and installed firmware extensions are displayed in octal form and rejected during symbolic entry.
Operands must be numeric and are interpreted by default in a radix suitable to the type of the value, rather than the
HP Assembler convention of assuming a decimal value unless the letter B, indicating an octal value, follows the
digits. For example, LDA 1000 loads from memory location 1000 octal, LIA 12 loads from select code 12 octal, and
RRR 12 rotates the registers right by 12 decimal places.
Memory Reference Group instructions use this extended syntax:
<opcode> {C | Z} <address>{,I}
...where the optional
C
or
Z
specifies a current-page or a zero-page (base-page) address, and the optional
I
specifies indirect addressing. If
C
or
Z
is specified, the address is restricted to the octal range 0-1777; otherwise,
the full 32K logical addressing range 0-77777 is allowed.
Memory Reference Group machine instructions address locations in either the 1024-word base page (page 0) or
the 1024-word current page (the page containing the instruction). Normally, the base/current selection and page
offset are implied by the address given: an address from 0-1777 is a base-page reference, an address within the
page containing the deposited instruction is a current-page reference, and any other address is illegal. For
example, entering
DEPOSIT 11000 LDA 10000
stores a current-page reference with an offset of 0. Entering
DEPOSIT 11000 LDA 1000
stores a base-page reference with an offset of 1000. Entering
DEPOSIT 11000 LDA
12000
is rejected as illegal, as the address is neither within the current page nor the base page.
C
or
Z
must be specified when the instruction is being entered into memory above the 32K logical address space or
into a device (e.g., disc) buffer. In these cases, the eventual containing address is unknown, making the implied
