19
Option
Action
NOFFP
Disable Fast FORTRAN Processor instructions; default
DBI
Enable the Double Integer Instructions
NODBI
Disable the Double Integer Instructions; default
EMA
Enable the Extended Memory Array instructions
NOEMA
Disable the Extended Memory Array instructions; default
VMAOS
Enable the Virtual Memory and Operating System instructions
NOVMAOS
Disable the Virtual Memory and Operating System instructions; default
VIS
Enable the Vector Instruction Set
NOVIS
Disable the Vector Instruction Set; default
SIGNAL
Enable the SIGNAL/1000 instructions
NOSIGNAL
Disable the SIGNAL/1000 Instructions; default
LOADERENABLE
Enable access to the protected binary loader
LOADERDISABLE
Disable access to the protected binary loader; default
IDLE
Enable idle detection
NOIDLE
Disable idle detection; default
STOP=<option>[;<option]
Enable simulation stops
NOSTOP=<option>[;<option]
Disable simulation stops; default
INDIR=<limit>
Set the maximum indirect addressing chain length; default is 16
EXEC=<match>[;<mask>]
Enable execution tracing of matching instructions
NOEXEC
Disable execution tracing; default
DEBUG=<option>
Enable tracing
NODEBUG
Disable tracing; default
If the memory size is being reduced, and the memory being truncated contains non-zero data, the simulator asks
for confirmation before proceeding. The confirmation request may be suppressed by using the
–F
(force) switch.
Data in the truncated portion of memory is lost.
The following standard microcode is automatically enabled when the applicable 1000-series CPU is selected:
Instruction Set
Applicable to
Extended Instruction Group
1000 M/E/F-Series
Floating-Point Processor
1000 F-Series
Scientific Instruction Set
1000 F-Series
The 1000 E/F-Series microcode self-test diagnostics are not simulated.
The
EAU
option simulates the installation of the 12579A Extended Arithmetic Unit providing hardware multiply,
divide, double load, double store, and 32-bit rotate and shift instructions. EAU instructions are standard equipment
on the 2100 and 1000 CPUs.
The
FP
option simulates the installation of the 12901A Floating Point firmware ROMs, providing single-precision
(two-word) floating-point add, subtract, multiply, divide, fix, and float instructions. FP instructions are standard
equipment on 1000 CPUs.
The
IOP
option simulates the installation of the 13206A (2100), 13207A (1000 M-Series), or 22702A (1000 E-
Series) 2000/Access I/O Processor firmware ROMs. These instructions accelerate certain common operations of
the I/O processor for the HP 2000/Access Time-Shared BASIC operating system.