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Model 8340A - Service
Figure
8C-20.
A39 PLL3 Phase/Frequency Detector Waveforms
PHASE LOCK INDICATOR
G
Clock I
Clock 2
Non-inverting
Output 1
Non-inverting
Output 2
The PHASE LOCK INDICATOR senses the outputs of the PHASE DETECTOR
to determine when the loop is locked. The non-inverting outputs
of the phase detector flip-flops are attenuated by R23 and summed
into the inverting input of UlA. The inverted outputs of the
flip-flops are tied together (wire-or) and input to the non
inverting input of UlA. Cl filters out the high frequency
components of the flip-flop outputs so the phase lock indicator
is looking at the average voltages on each input. When the
inverting input of UlA is more positive than the non-inverting
input, the indicator will show that a phase locked condition
occurs by lighting DSl and outputting a TTL low level signal for
HULL
8-220
Scans by HB9HCA and HB9FSX
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