Hotenda MPC8349EA, Technical Data Manual

Page: 37 / 87

Electronic Component Distributor. Source::Freescale Semiconductor
P.N:MPC8349CZUAGDB Desc:IC MPU POWERQUICC II PRO 672TBGA
Web:http://www.hotenda.cn E-mail:sales@hotenda.cn Phone:(+86) 075583794354
MPC8349EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 13
Freescale Semiconductor 37
Local Bus
Figure 20 provides the AC test load for the local bus.
Figure 20. Local Bus C Test Load
Table 39. Local Bus General Timing Parameters—DLL Bypass
9
Parameter Symbol
1
Min Max Unit Notes
Local bus cycle time t
LBK
15 — ns 2
Input setup to local bus clock t
LBIVKH
7 — ns 3, 4
Input hold from local bus clock t
LBIXKH
1.0 — ns 3, 4
LALE output fall to LAD output transition (LATCH hold time) t
LBOTOT1
1.5 — ns 5
LALE output fall to LAD output transition (LATCH hold time) t
LBOTOT2
3 — ns 6
LALE output fall to LAD output transition (LATCH hold time) t
LBOTOT3
2.5 — ns 7
Local bus clock to output valid t
LBKLOV
— 3 ns 3
Local bus clock to output high impedance for LAD/LDP t
LBKHOZ
— 4 ns 8
Notes:
1. The symbols for timing specifications follow the pattern of t
(first two letters of functional block)(signal)(state)(reference)(state)
for inputs
and t
(first two letters of functional block)(reference)(state)(signal)(state)
for outputs. For example, t
LBIXKH1
symbolizes local bus timing (LB)
for the input (I) to go invalid (X) with respect to the time the t
LBK
clock reference (K) goes high (H), in this case for clock one
(1). Also, t
LBKHOX
symbolizes local bus timing (LB) for the t
LBK
clock reference (K) to go high (H), with respect to the output
(O) going invalid (X) or output hold time.
2. All timings are in reference to the falling edge of LCLK0 (for all outputs and for LGTA and LUPWAIT inputs) or the rising edge
of LCLK0 (for all other inputs).
3. All signals are measured from OV
DD
/2 of the rising/falling edge of LCLK0 to 0.4
×
OV
DD
of the signal in question for 3.3 V
signaling levels.
4. Input timings are measured at the pin.
5. t
LBOTOT1
should be used when RCWH[LALE] is set and when the load on the LALE output pin is at least 10 pF less than the
load on the LAD output pins.
6. t
LBOTOT2
should be used when RCWH[LALE] is not set and when the load on the LALE output pin is at least 10 pF less than
the load on the LAD output pins.the
7. t
LBOTOT3
should be used when RCWH[LALE] is not set and when the load on the LALE output pin equals to the load on the
LAD output pins.
8. For purposes of active/float timing measurements, the Hi-Z or off-state is defined to be when the total current delivered
through the component pin is less than or equal to the leakage current specification.
9. DLL bypass mode is not recommended for use at frequencies above 66 MHz.
Output
Z
0
= 50
Ω OV
DD
/2
R
L
= 50
Ω
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