Hotenda MPC8349EA, Technical Data Manual

Page: 19 / 87

Electronic Component Distributor. Source::Freescale Semiconductor
P.N:MPC8349CZUAGDB Desc:IC MPU POWERQUICC II PRO 672TBGA
Web:http://www.hotenda.cn E-mail:sales@hotenda.cn Phone:(+86) 075583794354
MPC8349EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 13
Freescale Semiconductor 19
DDR and DDR2 SDRAM
6.2.2 DDR and DDR2 SDRAM Output AC Timing Specifications
Table 20 shows the DDR and DDR2 output AC timing specifications.
Table 20. DDR and DDR2 SDRAM Output AC Timing Specifications
At recommended operating conditions with GV
DD
of (1.8 or 2.5 V) ± 5%.
Parameter Symbol
1
Min Max Unit Notes
ADDR/CMD/MODT output setup with respect to MCK t
DDKHAS
ns 3
400 MHz 1.95 —
333 MHz 2.40 —
266 MHz 3.15 —
200 MHz 4.20 —
ADDR/CMD/MODT output hold with respect to MCK t
DDKHAX
ns 3
400 MHz 1.95 —
333 MHz 2.40 —
266 MHz 3.15 —
200 MHz 4.20 —
MCS(n) output setup with respect to MCK t
DDKHCS
ns 3
400 MHz 1.95 —
333 MHz 2.40 —
266 MHz 3.15 —
200 MHz 4.20 —
MCS(n) output hold with respect to MCK t
DDKHCX
ns 3
400 MHz 1.95 —
333 MHz 2.40 —
266 MHz 3.15 —
200 MHz 4.20 —
MCK to MDQS Skew t
DDKHMH
–0.6 0.6 ns 4
MDQ/MECC/MDM output setup with respect to
MDQS t
DDKHDS,
t
DDKLDS
ps 5
400 MHz 700 —
333 MHz 775 —
266 MHz 1100 —
200 MHz 1200 —
MDQ/MECC/MDM output hold with respect to MDQS t
DDKHDX,
t
DDKLDX
ps 5
400 MHz 700 —
333 MHz 900 —
266 MHz 1100 —
200 MHz 1200 —
MDQS preamble start t
DDKHMP
–0.5
×
t
MCK
– 0.6 –0.5
×
t
MCK
+ 0.6 ns 6
19 / 87