SYSTEM DESCRIPTION, INSTALLATION, AND MAINTENANCE MANUAL
MCS--4200/7200 Multi--Channel SATCOM System
23--20--35
15 Jul 2006
Honeywell International Inc. Do not copy without express permission of Honeywell.
Page 5--62
H.
SDU Controller Type
(1) The interpretation of this configuration pin is given in Table 5-14.
Table 5-14.
SDU Controller Type
TP10 Pin H
Interpretation
0
WSC SDU CONTROLLER TYPE
1
MCDU/SDU CONTROLLER TYPE
(2) When wired to the zero state, the SDU interfaces to the Williamsburg SDU controller
(WSC) interface. When wired to the one state, the SDU interfaces to the
Multi--Controller Display Unit (MCDU). The SDU chooses the appropriate interface
protocols and BITE failures based on the state of TP10H.
(3) When the WSC SDU controller type is selected, TP13B (Table 5--29) must also be
wired to the zero state since the WSC interface only operates at low speed.
I.
Call Light On (Air/Ground Calls)
(1) The interpretation of this configuration pin is given in Table 5-15.
Table 5-15.
Call Light On (Air/Ground Calls)
TP10 Pin K
Interpretation
0
CALL LIGHT ON AT CALL INITIATION (FOR AIR/GROUND CALLS)
1
CALL LIGHT ON AT CALL CONNECTION (FOR AIR/GROUND CALLS)
J.
Strap Parity (ODD)
(1) The interpretation of this configuration pin is given in Table 5-16.
Table 5-16.
Strap Parity (ODD)
TP11 Pin A
Interpretation
0
SUM OF ALL OTHER STRAPS SET TO 1 IS ODD
1
SUM OF ALL OTHER STRAPS SET TO 1 IS EVEN
(2) The coverage of the parity pin is SDU connector pins TP10A thru TP10K and TP11B
thru TP13K (39 pins other than itself). The parity pin is programmed to a zero or one
to yield an odd number of strap bits set to the one state, including the parity pin itself.
(3) The parity pin is wired to yield odd parity over all 40 configuration pins (i.e., the parity
pin is programmed to the zero or one state to yield an odd number of configuration
pins wired to the one state, including itself. The SDU verifies the state of the parity
pin is correct when the configuration pins are read (typically once per power cycle just
after power-up). An invalid state of the parity pin is logged/reported/indicated; the
states of the other configuration pins are used as read despite the parity error.
