Holtek HT46R22, Handbook

Page: 40 / 162

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External Timer Clock Input
Each device in the A/D series contains either one or two timers depending upon which one is cho-
sen. In the case of devices with a single timer, this pin is known as TMR, which is pin-shared with
PA4. However, for the 48-pin package HT46R24/HT46C24 devices, which have two internal tim-
ers, there are two independent input pins known as TMR0 and TMR1. For the 28-pin package
HT46R24/HT46C24 devices, which also have two internal timers, due to packaging limitations the
TMR0 pin is not available. On this package only the TMR1 external timer pin is available which is
pin-shared with PD1/PWM1/TMR1. If the PA4/TMR or PD1/PWM1/TMR1 pin is to be configured
as a timer input, the corresponding control bits in the timer control register must be correctly set.
The PA4/TMR and PD1/PWM1/TMR1 pin can be used as a normal I/O pin for applications that do
not require external timer inputs. For such applications, the timer mode control bits in the timer
control register must select the timer mode, which has an internal clock source, to prevent the I/O
from interfering with the timer counter operation.
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PFD, PWM Outputs, I
2
C Bus
Each device in the A/D series contains a PFD output, pin-shared with PA3, and one or more PWM
outputs, pin-shared with pins PD0~PD3. The number of PWM outputs depends upon which de-
vice is chosen. With the exception of the HT46R47/HT46C47 devices, there are two pins associ-
ated with an internal I
2
C Bus, which are pin-shared with I/O pins PA6 and PA7. The function of all
of these pins is chosen via configuration options and remains fixed after the device is pro-
grammed. Note that the correct software options within the application program must also be se-
lected to enable correct operation. If the I
2
C option is chosen, then note that any pull-high resistor
options associated with these pins will be automatically disconnected. For all pins, if chosen to
function as I/O pins, then full pull-high options remain.
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A/D Inputs
Each device in the A/D series has either four or eight inputs for the A/D converter. All of these ana-
log inputs are pin-shared with I/O pins on Port B. If these pins are to be used as A/D inputs and not
as normal I/O pins then the corresponding bits in the A/D Converter Control Register, ADCR, must
be properly set. There are no configuration options associated with the A/D function. If chosen as
I/O pins, then full pin-high resistor configuration options remain, however if used as A/D inputs
then any pull-high resistor options associated with these pins will be automatically disconnected.
Chapter 1 Hardware Structure
31
V
D D
M
U
X
W a k e - u p O p t i o n
S y s t e m W a k e - u p
( w a k e - u p f o r P A o n l y )
R e a d D a t a R e g i s t e r
D Q
C K
S
D Q
C K
S
C o n t r o l B i t
P u l l - H i g h O p t i o n
D a t a B u s
W r i t e C o n t r o l R e g i s t e r
C h i p R e s e t
R e a d C o n t r o l R e g i s t e r
W r i t e D a t a R e g i s t e r
D a t a B i t
I / O P i n
Q
Q
W e a k
P u l l - u p
Non-pin-shared Function Input/Output Ports