Holtek HT46R22, Handbook

Page: 65 / 162

will clear the HAAS bit. Also, if the transmitted address on the bus and the slave address of the de-
vice do not match, then the HAAS bit will be reset to
²
0
²
.
Bit 5, known as HBB, will be set to
²
1
²
if the I
2
C bus is busy, which will occur when a START signal
is detected. The HBB bit will be cleared to
²
0
²
if the bus is free which will occur when a STOP sig-
nal is detected. Bit 2, which is the SRW or Slave Read/Write bit, determines whether the master de-
vice wishes to transmit or receive data from the I
2
C bus. When the transmitted address and slave
address match, that is when the HAAS bit is set to
²
1
²
, the device will check the SRW bit to deter-
mine whether it should be in transmit mode or receive mode. If the SRW bit is equal to
²
1
²
the mas-
ter is requesting to read data from the bus, so the device should be in transmit mode. When the
SRW bit is equal to
²
0
²
, the master will write data to the bus, therefore the device should be in re-
ceive mode to read this data.
Bit 0, is the Receive Acknowledge bit and known as RXAK. When the RXAK bit has been reset to
²
0
²
it means that a correct acknowledge signal has been received at the 9th clock, after 8 bits of
data have been transmitted. When in the transmit mode, the transmitter checks the RXAK bit to de-
termine if the receiver wishes to receive the next byte. The transmitter will therefore continue send-
ing out data until the RXAK bit is set to
²
1
²
. When this occurs, the transmitter will release the SDA
line to allow the master to send a STOP signal to release the bus.
I
2
C Bus Communication
Communication on the I
2
C bus requires four separate steps, a START signal, a slave device ad-
dress transmission, a data transmission and finally a STOP signal. When a START signal is
placed on the I
2
C bus, all devices on the bus will receive this signal and be notified of the imminent
arrival of data on the bus. The first seven bits of the data will be the slave address with the first bit
being the MSB. If the address of the microcontroller matches that of the transmitted address, the
HAAS bit in the HSR register will be set and an I
2
C interrupt will be generated. After entering the in-
terrupt service routine, the microcontroller slave device must first check the condition of the HAAS
bit to determine whether the interrupt source originates from an address match or from the comple-
tion of an 8-bit data transfer. During a data transfer, note that after the 7-bit slave address has
56
A/D Type MCU
H S R R e g i s t e r
b 7 b 0
N o t i m p l e m e n t e d , r e a d a s " 0 "
R e c e i v e a c k n o w l e d g e f l a g
1 : n o t a c k n o w l e d g e d
0 : a c k n o w l e d g e d
M a s t e r d a t a r e a d / w r i t e r e q u e s t f l a g
1 : r e q u e s t d a t a r e a d
0 : r e q u e s t d a t a w r i t e
N o t i m p l e m e n t e d , r e a d a s " 0 "
I
2
C B u s b u s y f l a g
1 : b u s y
0 : n o t b u s y
H C F H B B H A A S S R W R X A K
C a l l i n g a d d r e s s m a t c h e d f l a g
1 : m a t c h e d
0 : n o t m a t c h e d
D a t a t r a n s f e r f l a g
1 : t r a n s f e r c o m p l e t e
0 : t r a n s f e r n o t c o m p l e t e