Holtek HT46R22 Handbook Download Page 1

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HT46R47, HT46R22,
HT46R23, HT46R24

A/D Type MCU

Handbook

October 2004

may be reproduced, stored in a retrieval system, or transmitted in any form by any means, electronic, mechanical photo-

copying, recording, or otherwise without the prior written permission of HOLTEK SEMICONDUCTOR INC.

Summary of Contents for HT46R22

Page 1: ...EMICONDUCTOR INC All rights reserved Printed in Taiwan No part of this publication may be reproduced stored in a retrieval system or transmitted in any form by any means electronic mechanical photo co...

Page 2: ...nt 7 Pin Description 8 Absolute Maximum Ratings 12 D C Characteristics 12 A C Characteristics 14 System Architecture 15 Clocking and Pipelining 15 Program Counter 16 Stack 18 Arithmetic and Logic Unit...

Page 3: ...4 Configuring the Timer Event Counter Input Clock Source 35 Timer Registers TMR TMRL TMRH TMR0L TMR0H TMR1L TMR1H 36 Timer Control Registers TMRC TMR0C TMR1C 37 Configuring the Timer Mode 39 Configuri...

Page 4: ...og Timer 74 Configuration Options 76 Application Circuits 77 Part II Programming Language 81 Chapter 2 Instruction Set Introduction 83 Instruction Set 83 Instruction Timing 83 Moving and Transferring...

Page 5: ...6 Summary of Assembly 117 Miscellaneous 117 Part III Development Tools 119 Chapter 5 MCU Programming Tools 121 HT IDE Development Environment 121 Holtek In Circuit Emulator HT ICE 122 HT ICE Interface...

Page 6: ...Appendix 131 Appendix A Device Characteristic Graphics 133 Appendix B Package Information 143 Contents v...

Page 7: ...vi A D Type MCU...

Page 8: ...converters of varying resolu tion and channel capacity The inclusion of PWM functions and an I2 C interface further enhance the features and application possibilities of the A D series of microcontrol...

Page 9: ...viii A D Type MCU...

Page 10: ...P a r t I Microcontroller Profile Part I Microcontroller Profile 1...

Page 11: ...2 A D Type MCU...

Page 12: ...rammable fre quency divider etc These features combine to ensure applications require a minimum of external components and therefore reduce overall product costs Having the benefits of integrated A D...

Page 13: ...16 OTP Mask ROM HT46R24 HT46C24 Data Memory 64 8 SRAM HT46R47 HT46C47 HT46R22 HT46C22 192 8 SRAM HT46R23 HT46C23 384 8 SRAM HT46R24 HT46C24 Table Read Function Multi level Hardware Stack 6 level HT46R...

Page 14: ...emory capacity I O count timer functions A D channels and PWM outputs To assist users in their selection of the most appropri ate device for their application the following table which summarizes the...

Page 15: ...D a t a M e m o r y A d d r e s s D e c o d e r M e m o r y P o i n t e r M U X A C C C o n f i g R e g i s t e r W a t c h d o g T i m e r R e s e t L V R C o n f i g R e g i s t e r T i m e r s C o...

Page 16: ...6 R 2 3 H T 4 6 C 2 3 2 8 S K D I P A S O P A 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 1 9 1 8 1 7 1 6 1 5 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 P B 5 A N 5 P B 4 A N 4 P A 3 P F D P A 2 P A 1 P A 0 P B 3...

Page 17: ...The A D inputs are selected via software instructions Once selected as an A D input the I O function and pull high resis tor functions are disabled automatically PD0 PWM I O Pull high I O or PWM Bidi...

Page 18: ...ically PC0 PC1 I O Pull high Bidirectional 2 bit input output port Software instructions determine if the pin is a CMOS output or Schmitt Trigger in put A configuration option determines if both pins...

Page 19: ...e if the pin is a CMOS output or Schmitt Trigger input A configuration option determines if all pins on this port have pull high resistors PD0 PWM0 PD1 PWM1 I O Pull high I O or PWM Bidirectional 2 bi...

Page 20: ...utput port Software instructions determine if the pin is a CMOS output or Schmitt Trigger in put A configuration option determines if all pins on this port have pull high resistors PD0 PWM0 PD1 PWM1 P...

Page 21: ...VSS 0 3V to VDD 0 3V Storage Temperature 50 C to 125 C Operating Temperature 40 C to 85 C These are stress ratings only Stresses exceeding the range specified under Absolute Maximum Ratings may cause...

Page 22: ...tage RES 0 9VDD VDD V VLVR Low Voltage Reset 2 7 3 3 3 V IOL I O Port Sink Current 3V VOL 0 1VDD 4 8 mA 5V VOL 0 1VDD 10 20 mA IOH I O Port Source Current 3V VOH 0 9VDD 2 4 mA 5V VOH 0 9VDD 5 10 mA RP...

Page 23: ...DTOSC Watchdog Oscillator Period 3V 45 90 180 ms 5V 32 65 130 ms tRES External Reset Low Pulse Width 1 ms tSST System Start up Timer Period Wake up from HALT 1024 tSYS tLVR Low Voltage Width to Reset...

Page 24: ...ram memory and from 64 to 384 bytes of data storage Clocking and Pipelining The main system clock derived from either a Crystal Resonator or RC oscillator is subdivided into four internally generated...

Page 25: ...ler manages program control by loading the required address into the Program Counter For conditional skip instructions once the condition has been met the next instruction which has already been fetch...

Page 26: ...8 7 6 5 4 3 2 1 0 Jump Call Branch 12 11 10 9 8 7 6 5 4 3 2 1 0 Return from Subroutine S12 S11 S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 S0 Note 1 PC12 PC8 Current Program Counter bits 2 7 0 PCL bits 3 12 0 Inst...

Page 27: ...should be taken to avoid such cases which might cause unpredictable program branching Note 1 For the HT46R47 HT46C47 and HT46R22 HT46C22 N 6 i e 6 levels of stack available 2 For the HT46R23 HT46C23 N...

Page 28: ...le pointer registers The following diagram shows the Program Memory for the A D Type microcontroller series Chapter 1 Hardware Structure 19 N o t I m p l e m e n t e d 1 6 b i t s 1 5 b i t s 1 4 b i...

Page 29: ...ices this internal vector is used by the I2 C bus interface When the I2 C bus requires data transfer the program will jump to this location and begin execution if the I2 C interrupt is enabled and the...

Page 30: ...to zero will be transferred to the TBLH regis ter automatically when the TABRDL m instruction is executed tempreg1 db temporary register 1 tempreg2 db temporary register 2 mov a 06h initialize table...

Page 31: ...he HT46R47 HT46C47 and HT46R22 HT46C22 the Table address location is 11 bits i e from b10 b0 Data Memory The Data Memory is a volatile area of 8 bit wide RAM internal memory and is the location where...

Page 32: ...giving the user a large range of flexibility for bit manipulation in the Data Memory Note The 384 bytes of General Purpose Data Memory in the HT46R24 HT46C24 are stored in two indi vidual memory banks...

Page 33: ...a d a s 0 0 I A R M P A C C P C L T B L P T B L H S T A T U S I N T C T M R T M R C P A P A C P B P B C P D P D C P W M A D R L A D R H A D C R A C S R H T 4 6 R 4 7 H T 4 6 C 4 7 H T 4 6 R 2 2 H T 4...

Page 34: ...wo Indirect Ad dressing Registers IAR0 and IAR1 and two Memory Pointers MP0 and MP1 are provided Note that these Indirect Addressing Registers are not physically implemented and that reading the Indi...

Page 35: ...ssary to first setup the bank pointer to ensure that the correct memory bank is selected It should be noted that the Special Function Data Memory is not affected by the bank selection which means the...

Page 36: ...out or by executing the CLR WDT or HALT instruction The PDF flag is affected only by executing the HALT or CLR WDT instruction or during a system power up The Z OV AC and C flags generally reflect th...

Page 37: ...t Counters of either 8 bit or 16 bit size For devices with a single timer counter an associated regis ter known as TMR is the location where the timer value is located An associated control register k...

Page 38: ...t output data register A D Converter Registers ADRL ADRH ADCR ADSR Each device in the A D microcontroller range contains either a 4 or 8 channel A D converter The correct operation of the A D requires...

Page 39: ...to control the input output configu ration With this control register each CMOS output or Schmitt Trigger input with or without pull high resistor structures can be reconfigured dynamically under soft...

Page 40: ...ci ated with an internal I2 C Bus which are pin shared with I O pins PA6 and PA7 The function of all of these pins is chosen via configuration options and remains fixed after the device is pro grammed...

Page 41: ...6 C 2 4 2 8 p i n p a c k a g e o n l y M U X T M R 1 H T 4 6 R 2 4 H T 4 6 C 2 4 2 8 p i n p a c k a g e o n l y W e a k P u l l u p PA3 PFD and PD0 PWM0 PD3 PWM3 Input Output Ports V D D M U X R e a...

Page 42: ...T o I 2 C C i r c u i t M U X W a k e u p O p t i o n S y s t e m W a k e u p W e a k P u l l u p PA6 SDA PA7 SCL Input Output Ports V D D M U X R e a d D a t a R e g i s t e r D Q C K S D Q C K S C o...

Page 43: ...Port A can be setup to have this function Timer Event Counters The provision of timers form an important part of any microcontroller giving the designer a means of carrying out time related functions...

Page 44: ...8 pin package HT46R24 HT46C24 devices The system clock input timer source is used when the timer is in the timer mode or in the pulse width measurement mode With the exception of TMR1 in the HT46R24 H...

Page 45: ...O N H i g h B y t e L o w B y t e 1 6 B i t T i m e r E v e n t C o u n t e r P F D 2 8 s t a g e p r e s c a l e r P S C 2 P S C 0 1 1 1 1 2 8 f S Y S 16 bit Timer Event Counter Structure HT46R23 HT...

Page 46: ...ta into the high byte timer register will result in the data being directly written to the high byte reg ister At the same time the data in the low byte buffer will be transferred into its associated...

Page 47: ...u n t e r m o d e t i m e r m o d e p u l s e w i d t h m e a s u r e m e n t m o d e P u l s e W i d t h M e a s u r e m e n t a c t i v e e d g e s e l e c t 1 s t a r t c o u n t i n g o n r i s i...

Page 48: ...nter Mode In this mode a number of externally changing logic events occurring on the external timer pin can be recorded by the internal timer For the timer to operate in the event counting mode the bi...

Page 49: ...r nal timer pin returns to its original low level As before the TON T0ON or T1ON bit will be automati cally reset to zero and the timer will stop counting It is important to note that in the Pulse Wid...

Page 50: ...mer Event Counters sec tion for details of its settings and operations For the PFD output to function it is essential that the corresponding bit of the Port A control regis ter PAC bit 3 is setup as a...

Page 51: ...t timer clock pulse arrives As a result there may be small differences in measured values requiring programmers to take this into account during programming The same applies if the timer is configured...

Page 52: ...verall PWM cycle frequency is fSYS 256 However when in the 7 1 mode of operation the PWM modulation frequency will be fSYS 128 while the PWM modula tion frequency for the 6 2 mode of operation will be...

Page 53: ...The first group which consists of bit1 bit7 is denoted here as the DC value The second group which consists of bit0 is known as the AC value In the 7 1 PWM mode the duty cycle value of each of the two...

Page 54: ...output data register will disable the PWM output function and force the output low In this way the Port D data output register can be used as an on off control for the PWM function Note that if the co...

Page 55: ...th the corre sponding follow on benefits of lower costs and reduced component space requirements Each of the devices in the Holtek A D series of microcontrollers contains either a 4 channel or 8 chann...

Page 56: ...el is actually connected to the internal A D converter For the HT46R22 HT46C22 HT46R23 HT46C23 and HT46R24 HT46C24 devices which have eight analog input channels the full three bits are required for c...

Page 57: ...1 e n a b l e d a s A N 0 A N 1 P B 0 P B 2 e n a b l e d a s A N 0 A N 2 P B 0 P B 3 e n a b l e d a s A N 0 A N 3 P B 0 P B 4 e n a b l e d a s A N 0 A N 4 P B 0 P B 5 e n a b l e d a s A N 0 A N 5...

Page 58: ...e values marked with an asterisk are not permissible as they are less than the specified minimum A D Clock Period fSYS A D Clock Period tAD ADCS1 ADCS0 00 fSYS 2 ADCS1 ADCS0 01 fSYS 8 ADCS1 ADCS0 10 f...

Page 59: ...R register Step 4 If the interrupts are to be used the interrupt control registers must be correctly configured to en sure the A D converter interrupt function is active Depending upon which device is...

Page 60: ...ister to configure Port PB0 PB3 as A D inputs and select AN0 to be connected to the A D converter mov a 00000001B mov ACSR a setup the ACSR register to select fSYS 8 as the A D clock Start_conversion...

Page 61: ...r mov a ADRH read conversion result from the high byte ADRH register mov adrh_buffer a save result to user defined register mov a ADRL read conversion result from the low byte ADRL register mov adrl_b...

Page 62: ...heir 9 bit resolution A D Converter is achieved with 8 bit accuracy while for the HT46R23 HT46C23 and HT46R24 HT46C24 their 10 bit resolution A D Converter is achieved with 9 bit accuracy Chapter 1 Ha...

Page 63: ...hen two devices communicate with each other on the bidirectional I2 C bus one is known as the master device and one as the slave device Both master and slave can transmit and receive data however it i...

Page 64: ...e mode and must be set high if the device is to be setup as a transmitter Bit 3 known as the TXAK bit is the transmit acknowledge bit After the receipt of 8 bits of data this bit will be transmitted t...

Page 65: ...se the SDA line to allow the master to send a STOP signal to release the bus I2 C Bus Communication Communication on the I2 C bus requires four separate steps a START signal a slave device ad dress tr...

Page 66: ...signal by the master will be detected by all devices on the I2 C bus To determine which slave device the master wishes to communicate with the address of the slave device will be sent out immediately...

Page 67: ...ternal address matches the calling address must generate an acknowledge signal This acknowl edge signal will inform the master that a slave device has accepted its calling address If no acknowledge si...

Page 68: ...e device must read the transmitted data from the HDR register Receive Acknowledge Bit When the receiver wishes to continue to receive the next data byte it must generate an acknowl edge bit known as T...

Page 69: ...ided known as INTC0 and INTC1 Once an interrupt subroutine is serviced all the other interrupts will be blocked by clearing the EMI bit This scheme may prevent any further interrupt nesting Other inte...

Page 70: ...i n t e r r u p t e n a b l e 1 e n a b l e 0 d i s a b l e T i m e r E v e n t C o u n t e r i n t e r r u p t e n a b l e 1 e n a b l e 0 d i s a b l e E x t e r n a l i n t e r r u p t r e q u e s...

Page 71: ...1 i n t e r r u p t e n a b l e 1 e n a b l e 0 d i s a b l e E T 1 I T 1 F E x t e r n a l i n t e r r u p t e n a b l e 1 e n a b l e 0 d i s a b l e T i m e r E v e n t C o u n t e r 0 i n t e r r...

Page 72: ...e is bit 2 and known as ET0I while the Timer 1 interrupt enable is bit 3 and known as ET1I An actual Timer Event Coun ter interrupt will be initialized when the Timer Event Counter interrupt request f...

Page 73: ...C23 devices this is bit 0 of the INTC1 register while for the HT46R24 HT46C24 devices this is bit 1 of the INTC1 register An actual I2 C interrupt will be ini tialized when the I2 C interrupt request...

Page 74: ...ithin the interrupt subroutine Interrupts often occur in an unpredictable manner or need to be serviced immediately in some applications If only one stack is left and the interrupt is not well control...

Page 75: ...Although the microcontroller has an internal RC reset function due to unstable power on condi tions an external RC network connected to the RES pin is generally recommended This time de lay created by...

Page 76: ...set Most of the conditions remain unchanged except that the Program Counter and the Stack Pointer will be cleared to 0 and the TO flag will be set to 1 Refer to the A C Characteristics for tSST detail...

Page 77: ...me out Normal Operation WDT Time out HALT MP x x x x x x x u u u u u u u u u u u u u u u u u u u u u ACC x x x x x x x x u u u u u u u u u u u u u u u u u u u u u u u u PCL 0 0 0 0 0 0 0 0 0 0 0 0 0 0...

Page 78: ...u u PA 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 u u u u u u u u PAC 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 u u u u u u u u PB 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 u u u u u...

Page 79: ...0 0 u u u u u u u PA 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 u u u u u u u u PAC 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 u u u u u u u u PB 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1...

Page 80: ...1 1 1 1 1 1 1 1 1 1 1 1 1 1 u u u u u u u u PB 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 u u u u u u u u PBC 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 u u u u u u u u PC 1 1 1 1 1 1 1 1 1...

Page 81: ...edback for oscillation with no other external compo nents required A ceramic resonator can be used instead of a crystal but two small value capaci tors should be connected between OSC1 OSC2 and ground...

Page 82: ...uency of oscillation This external capacitor should be added to improve oscillator stability if the open drain OSC2 output is utilized in the application circuit Watchdog Timer Oscillator The WDT osci...

Page 83: ...e regular interrupt response takes place If the external interrupt request flag is set to 1 before entering the HALT mode the wake up function of the related interrupt will be disabled Once a wake up...

Page 84: ...and SP Three methods can be adopted to clear the contents of the WDT The first is an external hardware reset a low level on the RES pin the second is via software instructions and the third is via a H...

Page 85: ...ser No Option 1 WDT clock source WDT oscillator or fSYS 4 or disable 2 CLRWDT instructions 1 or 2 instructions 3 PA0 PA7 wake up enable or disable by bit 4 PA PB PC PD PF pull high enable or disable N...

Page 86: ...P D 0 P W M P B 0 A N 0 P B 3 A N 3 P A 0 P A 2 P A 3 P F D P A 4 T M R P A 5 I N T P A 6 P A 7 0 1 m F R C S y s t e m O s c i l l a t o r 3 0 k W R O S C 7 5 0 k W V D D R O S C f S Y S 4 O S C 1 O...

Page 87: ...0 P A 2 P A 3 P F D P A 4 T M R P A 5 I N T P A 6 S D A P A 7 S C L P C 0 P C 1 S e e B e l o w V D D R O S C f S Y S 4 O S C 1 O S C 2 4 7 0 p F O S C 1 O S C 2 R 1 C 1 C 2 O S C C i r c u i t F o r...

Page 88: ...3 P F D P A 4 T M R P A 5 I N T P A 6 S D A P A 7 S C L P C 0 P C 4 P D 0 P W M 0 P D 1 P W M 1 V D D R O S C f S Y S 4 O S C 1 O S C 2 4 7 0 p F O S C 1 O S C 2 R 1 C 1 C 2 O S C C i r c u i t F o r...

Page 89: ...T P A 6 S D A P A 7 S C L P C 0 P C 7 P D 4 P D 7 P F 0 P F 7 S e e B e l o w P D 0 P W M 0 P D 3 P W M 3 V D D R O S C f S Y S 4 O S C 1 O S C 2 4 7 0 p F O S C 1 O S C 2 R 1 C 1 C 2 O S C C i r c u...

Page 90: ...P a r t I I Programming Language Part II Programming Language 81...

Page 91: ...82 A D Type MCU...

Page 92: ...struction cycle is equal to 4 system clock cycles therefore in the case of an 8MHz system oscillator most instruc tions would be implemented within 0 5ms and branch or call instructions would be imple...

Page 93: ...rotating one bit right or left Different rotate instructions exist depending on program requirements Rotate instructions are useful for serial port programming applications where data can be rotated f...

Page 94: ...of other instructions also exist such as HALT instruction for Power down operation and instructions to control the operation of the Watchdog Timer for reliable program operations under extreme electri...

Page 95: ...with result in ACC Increment Data Memory Decrement Data Memory with result in ACC Decrement Data Memory 1 1Note 1 1Note Z Z Z Z Rotate RRA m RR m RRCA m RRC m RLA m RL m RLCA m RLC m Rotate Data Memor...

Page 96: ...d Data Memory Read table last page to TBLH and Data Memory 2Note 2Note None None Miscellaneous NOP CLR m SET m CLR WDT CLR WDT1 CLR WDT2 SWAP m SWAPA m HALT No operation Clear Data Memory Set Data Mem...

Page 97: ...88 A D Type MCU...

Page 98: ...ted flag s OV Z AC C ADD A m Add Data Memory to ACC Description The contents of the specified Data Memory and the Accumulator are added The result is stored in the Accumulator Operation ACC ACC m Affe...

Page 99: ...s stored in the Data Memory Operation m ACC AND m Affected flag s Z CALL addr Subroutine call Description Unconditionally calls a subroutine at the specified address The Program Counter then in cremen...

Page 100: ...unc tion with CLR WDT1 and must be executed alternately with CLR WDT1 to have effect Re petitively executing this instruction without alternately executing CLR WDT1 will have no effect Operation WDT c...

Page 101: ...e precision decimal addition Operation m ACC 00H or m ACC 06H or m ACC 60H or m ACC 66H Affected flag s C DEC m Decrement Data Memory Description Data in the specified Data Memory is decremented by 1...

Page 102: ...iption The contents of the specified Data Memory are copied to the Accumulator Operation ACC m Affected flag s None MOV A x Move immediate data to ACC Description The immediate data specified is loade...

Page 103: ...immediate data to ACC Description The Program Counter is restored from the stack and the Accumulator loaded with the specified immediate data Program execution continues at the restored address Operat...

Page 104: ...the specified Data Memory and the carry flag are rotated left by 1 bit Bit 7 replaces the Carry bit and the original carry flag is rotated into the bit 0 The rotated result is stored in the Accumulat...

Page 105: ...r Note that if the result of subtraction is negative the C flag will be cleared to 0 otherwise if the result is pos itive or zero the C flag will be set to 1 Operation ACC ACC m C Affected flag s OV Z...

Page 106: ...Skip if increment Data Memory is 0 Description The contents of the specified Data Memory are first incremented by 1 If the result is 0 the following instruction is skipped As this requires the inserti...

Page 107: ...stored in the Data Memory Note that if the result of subtraction is negative the C flag will be cleared to 0 otherwise if the result is positive or zero the C flag will be set to 1 Operation m ACC m...

Page 108: ...SZ m i Skip if bit i of Data Memory is 0 Description If bit i of the specified Data Memory is 0 the following instruction is skipped As this re quires the insertion of a dummy instruction while the n...

Page 109: ...to Data Memory Description Data in the specified Data Memory and the Accumulator perform a bitwise logical XOR op eration The result is stored in the Data Memory Operation m ACC XOR m Affected flag s...

Page 110: ...g list describes the notations used by this document Example of Convention Description of Convention optional items Syntax elements that are enclosed by a pair of brackets are optional For example the...

Page 111: ...ocessing Name Statements can be assigned labels to enable easy access by other statements A name consists of the following characters A Z a z 0 9 _ with the following restrictions 0 9 cannot be the fi...

Page 112: ...s true i e non zero The IFE directive grants assembly if the value of the expression is false i e zero Example IF debugcase ACC1 equ 5 extern username byte ENDIF In this example the value of the varia...

Page 113: ...aximum page size of the listing file to 57 lines Syntax LIST NOLIST Description The directives LIST and NOLIST decide whether or not the source program lines are to be copied to the program listing fi...

Page 114: ...align combine class Description The SECTION directive marks the beginning of a program section A program section is a col lection of instructions and or data whose addresses are relative to the secti...

Page 115: ...the contiguous memory Sections with the same class name are loaded into the memory one after another The class name CODE is used for sections stored in ROM and the class name DATA is used for sections...

Page 116: ...at is available to other modules in the program The EXTERN directive on the other hand declares an external vari able label or symbol of the specified name and type The type can be one of the four typ...

Page 117: ...oss Assembler will clear any redundant bits expression1 has to be a value or a label This directive may also be employed to setup the ta ble in the code section Example table1 DC 0128h 025CH In this e...

Page 118: ...4 for sbuf and bit 1 of location 3 for cflag Syntax name LABEL BIT BYTE WORD Description The name with the data type has the same address as the following data variable Example lab1 LABEL WORD d1 DB...

Page 119: ...orary name that is re placed by a unique name when the macro is expanded The Cross Assembler creates a new ac tual name for dummy name each time the macro is expanded The actual name has the form digi...

Page 120: ...r s i o n 2 8 0 P a g e 1 1 0 0 0 0 T A S M 2 0 0 0 0 S a m p l e p r o g r a m f o r M A C R O 3 0 0 0 0 L i s t M a c r o 4 0 0 0 0 D e l a y M A C R O t m p 1 t m p 2 5 0 0 0 0 L O C A L l a b e l...

Page 121: ...erand type i e source operand or destination operand The dollar sign is a special operand namely the current location oper and An expression consists of many operands that are combined to describe a v...

Page 122: ...OFFSET operator is an immediate operand LOW MID and HIGH operator Syntax LOW expression MID expression HIGH expression The LOW MID HIGH operator returns the value of an expression if the result of th...

Page 123: ...of EQU are not allowed to be forward referenced Local Labels Alocal label is a label with a fixed form such as number The number can be 0 29 The function of a local label is the same as a label excep...

Page 124: ...RAMBANK AND EXTERN MID ROMBANK BANK HIGH MOD SECTION BYTE IF NEAR SHL DB IFDEF NOLIST SHR DBIT IFE NOLISTINCLUDE WORD DC IFNDEF NOLISTMACRO XOR Reserved Names instruction mnemonics ADC HALT RLCA SUB A...

Page 125: ...set code statement Line number is the number of the line starting from the first statement in the assembly source file 4 decimal digits The 2nd field offset is the offset from the beginning of the cur...

Page 126: ...information provided at the end of the Cross Assembler listing file Miscellaneous If any errors occur during assembly each error message and error number will appear directly be low the statement wher...

Page 127: ...C C 0 0 0 0 0 0 0 F 5 5 0 0 8 0 0 0 8 0 0 F A A 0 0 9 3 0 F 0 0 0 0 9 2 1 F 1 4 0 7 0 0 0 F 0 0 0 F 0 0 2 8 0 0 1 2 3 4 A B C D E r r o r s p a g e 6 0 l i s t i n c l u d e l i s t m a c r o p a p a...

Page 128: ...P a r t I I I Development Tools Part III Development Tools 119...

Page 129: ...120 A D Type MCU...

Page 130: ...pplications based on the Holtek range of 8 bit MCUs The key component within the HT IDE system is the HT ICE In Circuit Emulator capable of emulating the Holtek 8 bit MCU in real time in addition to p...

Page 131: ...behavior of the LCD panel Holtek In Circuit Emulator HT ICE Developed alongside the Holtek 8 bit microcontroller device range the Holtek ICE is a fully func tional in circuit emulator for Holtek s 8 b...

Page 132: ...e unable to use this supplied socket System Configuration The HT IDE system configuration is shown below in which the host computer is a Pentium compat ible machine with Windows 95 98 NT 2000 XP or la...

Page 133: ...quency selection Set the jumper JP2 to select the MCU s A D converter AVDD power supply source Short positions 1 and 2 on JP2 if the HT ICE 5V supply voltage is to be used as the source For other exte...

Page 134: ...E Step 2 Connect the target board to the HT ICE by using the I O interface card or flat cable Step 3 Connect the HT ICE to the host machine using the printer cable The LED on the HT ICE should now be...

Page 135: ...lowing dialog will be shown Click HT IDE3000 or Service Pack as you want Here s an Example of installing HT IDE3000 Click HT IDE3000 button Step 2 Press the Next button to continue setup or press Canc...

Page 136: ...ll be shown to ask the user to enter a directory name Step 4 Specify the path you want to install the HT IDE3000 and click Next button Step 5 Setup will copy all files to the specified directory Chapt...

Page 137: ...ibraries DLL and configuration files CFG FMT for all supported MCU The INCLUDE subdirectory contains all the include files H INC provided by Holtek The LIB subdirectory contains the library files LIB...

Page 138: ...to add delete files to from the project Select a source file name say TEST ASM and click Add button Click OK button after you setup all files in the project Step 3 Build the Project Click on Project...

Page 139: ...L o a d e r 4 C o d e G e n e r a t o r O B J T o o l s L i b r a r y M a n a g e r L I B L i n k e r C r e a t e T a s k F i l e M A P D B G D e b u g G o G o t o C u r s o r J u m p t o C u r s o r...

Page 140: ...Appendix Appendix 131...

Page 141: ...132 A D Type MCU...

Page 142: ...data gathered on units from different lots over a period of time This is for in formation only and the figures were not tested during manufacturing In some of the graphs the data exceeding the specifi...

Page 143: ...W R 7 5 k W R 8 2 k W R 1 0 0 k W R 1 5 0 k W R 3 0 0 k W R 7 5 0 k W 2 4 2 6 2 8 3 3 2 3 4 3 6 3 8 4 4 2 4 4 4 6 4 8 5 5 2 5 4 5 6 5 8 6 2 2 R 4 3 k W 1 2 1 0 8 6 4 2 0 V D D 5 V T C f O S C f O S C...

Page 144: ...A Device Characteristic Graphics 135 I O H m A V O H V o l t s 8 5 C 2 5 C 0 C 4 0 C 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 8 0 9 0 2 5 3 3 5 4 4 5 5 I O H m A 0 5 1 0 1 5 2 0 2 5 3 0 3 5 4 0 1 5 1 8 2 1 2 4...

Page 145: ...VDD 5V 136 A D Type MCU I O L m A V O L V o l t s 8 5 C 2 5 C 4 0 C 0 C 7 0 6 0 5 0 4 0 3 0 2 0 1 0 0 8 0 0 0 3 0 6 0 9 1 2 1 5 I O L m A V O L V o l t s 1 4 0 1 2 0 1 0 0 8 0 6 0 4 0 2 0 0 0 0 5 1 1...

Page 146: ...1 0 1 0 0 9 0 8 0 7 0 6 0 5 0 4 0 3 0 2 0 1 0 0 2 4 2 6 2 8 3 3 2 3 4 3 6 3 8 4 4 2 4 4 4 6 4 8 5 5 2 5 4 5 6 5 8 6 2 2 R P H k W V D D V o l t s 2 2 4 2 6 2 8 3 3 2 3 4 3 6 3 8 4 4 2 4 4 4 6 4 8 5 5...

Page 147: ...4 3 2 1 0 2 4 2 6 2 8 3 3 2 3 4 3 6 3 8 4 4 2 4 4 4 6 4 8 5 5 2 5 4 5 6 5 8 6 2 2 2 I S T B m A V D D V o l t s 2 4 2 6 2 8 3 3 2 3 4 3 6 3 8 4 4 2 4 4 4 6 4 8 5 5 2 5 4 5 6 5 8 6 2 2 2 8 5 C 2 5 C 0...

Page 148: ...x A Device Characteristic Graphics 139 0 5 0 0 0 1 0 0 0 0 1 5 0 0 0 2 0 0 0 0 8 7 6 5 4 3 2 1 0 2 4 V 2 2 V 3 3 V 3 V 5 V 4 V 6 V 5 5 V I D D m A F R E Q U E N C Y k H z I D D m A F R E Q U E N C Y k...

Page 149: ...Ta 85 C 140 A D Type MCU I D D m A F R E Q U E N C Y k H z 0 5 0 0 0 1 0 0 0 0 1 5 0 0 0 2 0 0 0 0 8 7 6 5 4 3 2 1 0 6 V 5 5 V 3 3 V 3 V 5 V 4 V 2 4 V 2 2 V I D D m A F R E Q U E N C Y k H z 0 5 0 0 0...

Page 150: ...Typical VLVR vs Temperature Appendix A Device Characteristic Graphics 141 6 0 4 0 2 0 0 2 0 4 0 6 0 8 0 1 0 0 V L V R V o l t s T C 1 2 0 3 6 3 5 3 4 3 3 3 2 3 1 3 0 2 9 2 8 2 7 2 6 2 5 2 4...

Page 151: ...142 A D Type MCU...

Page 152: ...A p p e n d i x B Package Information Appendix B Package Information 143 B...

Page 153: ...DIP 300mil Outline Dimensions Symbol Dimensions in mil Min Nom Max A 895 915 B 240 260 C 125 135 D 125 145 E 16 20 F 50 70 G 100 H 295 315 I 335 375 a 0 15 144 A D Type MCU 1 8 1 1 0 9 a A B C D E F...

Page 154: ...P 300mil Outline Dimensions Symbol Dimensions in mil Min Nom Max A 394 419 B 290 300 C 14 20 C 447 460 D 92 104 E 50 F 4 G 32 38 H 4 12 a 0 10 Appendix B Package Information 145 1 8 1 1 0 9 A B C D E...

Page 155: ...DIP 300mil Outline Dimensions Symbol Dimensions in mil Min Nom Max A 1235 1265 B 255 265 C 125 135 D 125 145 E 16 20 F 50 70 G 100 H 295 315 I 345 360 a 0 15 146 A D Type MCU 2 4 1 1 3 1 2 a A B C D E...

Page 156: ...300mil Outline Dimensions Symbol Dimensions in mil Min Nom Max A 394 419 B 290 300 C 14 20 C 590 614 D 92 104 E 50 F 4 G 32 38 H 4 12 a 0 10 Appendix B Package Information 147 2 4 1 1 3 1 2 A B C D E...

Page 157: ...DIP 300mil Outline Dimensions Symbol Dimensions in mil Min Nom Max A 1375 1395 B 278 298 C 125 135 D 125 145 E 16 20 F 50 70 G 100 H 295 315 I 330 375 a 0 15 148 A D Type MCU 2 8 1 1 5 1 4 a A B C D E...

Page 158: ...300mil Outline Dimensions Symbol Dimensions in mil Min Nom Max A 394 419 B 290 300 C 14 20 C 697 713 D 92 104 E 50 F 4 G 32 38 H 4 12 a 0 10 Appendix B Package Information 149 2 8 1 1 5 1 4 A B C D F...

Page 159: ...pin SSOP 300mil Outline Dimensions Symbol Dimensions in mil Min Nom Max A 395 420 B 291 299 C 8 12 C 613 637 D 85 99 E 25 F 4 10 G 25 35 H 4 12 a 0 8 150 A D Type MCU 4 8 1 2 5 2 4 A B C D F C G H a...

Page 160: ...http www holtek com tw Holtek Semiconductor Inc Headquarters No 3 Creation Rd II Science Park Hsinchu Taiwan Tel 886 3 563 1999 Fax 886 3 563 1189 http www holtek com tw Holtek Semiconductor Inc Taip...

Page 161: ...A D Type MCU...

Page 162: ...Amendments...

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