PFC Register
·
BS83C24-3
Bit
7
6
5
4
3
2
1
0
Name
¾
¾
¾
¾
D3
D2
D1
D0
R/W
¾
¾
¾
¾
R/W
R/W
R/W
R/W
POR
¾
¾
¾
¾
1
1
1
1
Bit 7~4
unimplemented, read as
²
0
²
Bit 3~0
PFC
: Port F bit 3~bit 0 input/output control
0: output
1: input
I/O Pin Structures
The accompanying diagrams illustrate the internal structures of some generic I/O pin types. As the
exact logical construction of the I/O pin will differ from these drawings, they are supplied as a guide
only to assist with the functional understanding of the I/O pins. The wide range of pin-shared
structures does not permit all types to be shown.
Programming Considerations
Within the user program, one of the first things to consider is port initialisation. After a reset, all of the
I/O data and port control register will be set high. This means that all I/O pins will default to an input
state, the level of which depends on the other connected circuitry and whether pull-high selections
have been chosen. If the port control register, PAC~PFC, is then programmed to setup some pins as
outputs, these output pins will have an initial high output value unless the associated port data register,
PA~PF, is first programmed. Selecting which pins are inputs and which are outputs can be achieved
byte-wide by loading the correct values into the appropriate port control register or by programming
individual bits in the port control register using the
²
SET [m].i
²
and
²
CLR [m].i
²
instructions. Note
that when using these bit control instructions, a read-modify-write operation takes place. The
microcontroller must first read in the data on the entire port, modify it to the required new bit values
and then rewrite this data back to the output ports.
Port A has the additional capability of providing wake-up functions. When the device is in the SLEEP
or IDLE Mode, various methods are available to wake the device up. One of these is a high to low
transition of any of the Port A pins. Single or multiple pins on Port A can be setup to have this function.
Rev. 1.50
66
April 28, 2020
BS83B08-3/B12-3/B16-3/B16G-3/C24-3
8-Bit Touch Key Flash MCU
V
D D
M
U
X
W a k e - u p S e l e c t
S y s t e m W a k e - u p
R e a d D a t a R e g i s t e r
D
Q
C K
S
D
Q
C K
S
C o n t r o l B i t
D a t a B u s
W r i t e C o n t r o l R e g i s t e r
C h i p R e s e t
R e a d C o n t r o l R e g i s t e r
W r i t e D a t a R e g i s t e r
D a t a B i t
I / O p i n
Q
Q
W e a k
P u l l - u p
P u l l - H i g h
R e g i s t e r
S e l e c t
P A o n l y
Generic Input/Output Structure
