MFI2 Register -- BS83C24-3
Bit
7
6
5
4
3
2
1
0
Name
M516CTF
D6
M416CTF
D4
M516CTE
D2
M416CTE
D0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
POR
0
0
0
0
0
0
0
0
Bit 7
M516CTF
: Touch key module 5 16-bit counter interrupt request flag
0: no request
1: interrupt request
Bit 6
D6
: Reserved bit, must not be modified.
Bit 5
M416CTF
: Touch key module 4 16-bit counter interrupt request flag
0: no request
1: interrupt request
Bit 4
D4
: Reserved bit, must not be modified.
Bit 3
M516CTE
: Touch key module 5 16-bit timer interrupt control
0: disable
1: enable
Bit 2
D2
: Reserved bit, must not be modified.
Bit 1
M416CTE
: Touch key module 4 16-bit timer interrupt control
0: disable
1: enable
Bit 0
D0
: Reserved bit, must not be modified.
Interrupt Operation
When the conditions for an interrupt event occur, such as a Touch Key Counter overflow, Timer/Event
Counter overflow, etc. the relevant interrupt request flag will be set. Whether the request flag actually
generates a program jump to the relevant interrupt vector is determined by the condition of the
interrupt enable bit. If the enable bit is set high then the program will jump to its relevant vector; if the
enable bit is zero then although the interrupt request flag is set an actual interrupt will not be generated
and the program will not jump to the relevant interrupt vector. The global interrupt enable bit, if cleared
to zero, will disable all interrupts.
When an interrupt is generated, the Program Counter, which stores the address of the next instruction
to be executed, will be transferred onto the stack. The Program Counter will then be loaded with a new
address which will be the value of the corresponding interrupt vector. The microcontroller will then
fetch its next instruction from this interrupt vector. The instruction at this vector will usually be a JMP
instruction which will jump to another section of program which is known as the interrupt service
routine. Here is located the code to control the appropriate interrupt. The interrupt service routine must
be terminated with a RETI instruction, which retrieves the original Program Counter address from
the stack and allows the microcontroller to continue with normal execution at the point where the
interrupt occurred.
The various interrupt enable bits, together with their associated request flags, are shown in the
accompanying diagrams with their order of priority. Some interrupt sources have their own
individual vector while others share the same multi-function interrupt vector. Once an interrupt
subroutine is serviced, all the other interrupts will be blocked, as the global interrupt enable bit, EMI
bit will be cleared automatically. This will prevent any further interrupt nesting from occurring.
However, if other interrupt requests occur during this interval, although the interrupt will not be
immediately serviced, the request flag will still be recorded.
If an interrupt requires immediate servicing while the program is already in another interrupt service
routine, the EMI bit should be set after entering the routine, to allow interrupt nesting. If the stack is
full, the interrupt request will not be acknowledged, even if the related interrupt is enabled, until the
Stack Pointer is decremented. If immediate service is desired, the stack must be prevented from
becoming full. In case of simultaneous requests, the accompanying diagram shows the priority that is
Rev. 1.50
104
April 28, 2020
BS83B08-3/B12-3/B16-3/B16G-3/C24-3
8-Bit Touch Key Flash MCU
