The 16-bit timer, TMR1, can operate in three different modes. To choose which of the three modes the
timer is to operate in, either in the timer mode, the event counting mode or the pulse width capture
mode, bits 7 and 6 of the Timer Control Register, which are known as the bit pair T1M1/T1M0, must
be set to the required logic levels. If the TMR1 is in the event count or pulse width capture mode, the
active transition edge level type is selected by the logic level of bit 3 of the Timer Control Register
which is known as T1EG.
TMR0C Register
·
BS83B08-3/B12-3/B16-3/B16G-3
Bit
7
6
5
4
3
2
1
0
Name
¾
¾
TS
TON
¾
TPSC2
TPSC1
TPSC0
R/W
¾
¾
R/W
R/W
¾
R/W
R/W
R/W
POR
¾
¾
0
0
¾
0
0
0
Bits 7, 6
unimplemented, read as
²
0
²
Bit 5
TS
: Timer/Event Counter Clock Source
0: f
SYS
1: f
LIRC
Bit 4
TON
: Timer/Event Counter Counting Enable
0: disable
1: enable
Bit 3
unimplemented, read as
²
0
²
Bits 2~0
TPSC2
~
TPSC0
: Timer prescaler rate selection
Timer internal clock=
000: f
TP
001: f
TP
/2
010: f
TP
/4
011: f
TP
/8
100: f
TP
/16
101: f
TP
/32
110: f
TP
/64
111: f
TP
/128
·
BS83C24-3
Bit
7
6
5
4
3
2
1
0
Name
¾
¾
T0S
T0ON
¾
T0PSC2
T0PSC1
T0PSC0
R/W
¾
¾
R/W
R/W
¾
R/W
R/W
R/W
POR
¾
¾
0
0
¾
0
0
0
Bits 7, 6
unimplemented, read as
²
0
²
Bit 5
T0S
: Timer/Event Counter Clock Source
0: f
SYS
1: f
LIRC
Bit 4
T0ON
: Timer/Event Counter Counting Enable
0: disable
1: enable
Bit 3
unimplemented, read as
²
0
²
Bits 2~0
T0PSC2
~
T0PSC0
: Timer prescaler rate selection
Timer internal clock=
000: f
TP
001: f
TP
/2
010: f
TP
/4
011: f
TP
/8
100: f
TP
/16
101: f
TP
/32
110: f
TP
/64
111: f
TP
/128
BS83B08-3/B12-3/B16-3/B16G-3/C24-3
8-Bit Touch Key Flash MCU
Rev. 1.50
69
April 28, 2020