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5.4.3 Register Map
Table 5.8 shows a register map for the SH7760 internal LCD controller.
Table 5.8 LCD Controller Registers
Address
Initial value
Register name
H’FE300C00
H’0101
Input clock register
H’FE300C02
H’0109
Module type register
H’FE300C04
H’000C
Data format register
H’FE300C06
H’0000
Scan mode register
H’FE300C08
H’0C000000
Data fetch start address register for data
on the display top
H’FE300C0C
H’0C000000
Data fetch start address register for data
on the display bottom
H’FE300C10
H’0280
Fetch data line address offset register for
display data
H’FE300C12
H’0000
Palette control register
H’FE300800~
H’FE300BFC
-
Palette data register
H’FE300C14
H’4F52
Horizontal character count register
H’FE300C16
H’0050
Horizontal synchronization signal register
H’FE300C18
H’01DF
Vertical display line count register
H’FE300C1A
H’01DF
Vertical total line count register
H’FE300C1C
H’01DF
Vertical synchronization signal register
H’FE300C1E
H’000C
AC modulation signal toggle line count
register
H’FE300C20
H’0000
Interrupt control register
H’FE300C24
H’0010
Power management mode register
H’FE300C26
H’F60F
Power supply control sequence duration
register
H’FE300C28
H’0000
Control register
Summary of Contents for SH7760 Solution Engine2
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