Chapter 4. Ladder Diagram (LD) Programming
GFK-2950C
February 2018
169
Operands for Shift Register
Parameter Description
Allowed Operands Optional
Length (??) The number of data items in the shift register, ST.
1
Length
256
No
R
Reset. When R is ON, the shift register located at ST is filled with
zeroes.
Power flow
No
N
The number of data items to shift into ST.
Constants
No
IN
The value to shift into the first data item of ST.
SHFR_BIT:
For %I, %Q, %M and %T memory, any BOOL
reference may be used; it does not need to be byte-aligned.
However, 1 bit, beginning with the reference address specified,
is displayed online.
All
No
ST
The first data item of the shift register.
Note:
For %I, %Q, %M and %T memory, any BOOL reference
may be used; it does not need to be byte-aligned.
However, 16 bits, beginning with the reference address
specified, are displayed online.
All except data flow,
constants, S
No
Q
The data shifted out of ST. The same number of data items will
be shifted into Q as were shifted out of ST.
SHFR_BIT:
For %I, %Q, %M and %T memory, any BOOL
reference may be used; it does not need to be byte-aligned.
However, 1 bit, beginning with the reference address specified,
is displayed online.
All except S
No
Example
SHFR_WORD operates on register memory locations
%R0001 through %R0100. When the reset reference CLEAR
is active, the Shift Register words are set to zero.
When the NXT_CYC reference is active and CLEAR is not,
the two words at the starting address V_Q00033 are
shifted into the Shift Register at %R0001. The words shifted
out of the Shift Register from %R0100 are stored in output
%M0005. Note that, for this example, the length specified
and the amount of data to be shifted (N) are not the same.
Summary of Contents for PACSystems RSTi-EP
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