GE Agile P50 Series, Technical Manual

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P50 Agile P153 6 Protection Functions
P153/EN M/B 6-15
2.9.2 Cold Load Pickup for SWITCH ONTO FAULT Condition
In some feeder applications, fast tripping may be required if a fault is already present on the feeder
when it is energized. Such faults may be due to a fault condition not having been removed from the
feeder, or due to earthing clamps having been left on following maintenance. In either case, it is
desirable to clear the fault condition quickly, rather than waiting for the time delay imposed by IDMT
overcurrent protection. The CLP logic can cater for this situation. Selected overcurrent/earth fault
stages could be set to instantaneous operation for a defined period following circuit breaker closure
(typically 200 ms). Therefore, instantaneous fault clearance would be achieved for a switch onto fault
(SOTF) condition
2.10 Inrush Current Blocking Function (2ND Harm Blocking)
When a transformer is initially connected to a source of AC voltage, there may be a substantial surge
of current through the primary winding called inrush current. This is analogous to the inrush current
exhibited by an electric motor that is started up by sudden connection to a power source, although
transformer inrush is caused by a different phenomenon.
In an ideal transformer, the magnetizing current would rise to approximately twice its normal peak
value as well, generating the necessary MMF to create this higher-than-normal flux. However, most
transformers are not designed with enough of a margin between normal flux peaks and the saturation
limits to avoid saturating in a condition like this, and so the core will almost certainly saturate during
this first half-cycle of voltage. During saturation, disproportionate amounts of MMF are needed to
generate magnetic flux. This means that winding current, which creates the MMF to cause flux in the
core, could rise to a value way in excess of its steady state peak value. Furthermore, if the transformer
happens to have some residual magnetism in its core at the moment of connection to the source, the
problem could be further exacerbated.
We can see that inrush current is a regularly occurring phenomenon and should not be considered a
fault, as we do not wish the protection device to issue a trip command whenever a transformer or
machine is switched on. This presents a problem to the protection device, because it should always
trip on an internal fault. The problem is that typical internal transformer faults may produce
overcurrents which are not necessarily greater than the inrush current. Furthermore faults tend to
manifest themselves on switch on, due to the high inrush currents. For this reason, we need to find a
mechanism that can distinguish between fault current and inrush current. Fortunately this is possible
due to the different natures of the respective currents. An inrush current waveform is rich in harmonics,
whereas an internal fault current consists only of the fundamental. We can thus develop a restraining
method based on the harmonic content of the inrush current. The mechanism by which this is
achieved is called second harmonic blocking.
2.10.1 Second Harmonic Blocking Implementation
Second harmonic blocking can be applied to the following overcurrent protection types:
•
Phase Overcurrent protection
•
Earth Fault protection
Second harmonic blocking is implemented in the GROUP (n) SYSTEM CONFIG column, where (n) is
the number of the setting group.
Second harmonic blocking is applicable to all stages of each of the elements.
The function works by identifying and measuring the inrush currents present at switch on. It does this
by comparing the value of the second harmonic current components to the value of the fundamental
component. If this ratio exceeds the set thresholds, then the blocking signal is generated. The
threshold is defined by the
2ndHarm Thresh setting.
We only want the function to block the protection if the fundamental current component is within the
normal range. If this exceeds the normal range, then this is indicative of a fault, which must be