Enabling and Reading IRQ’s
In order to service interrupts from the IRQ line, the IRQ control register (Status Byte) must first be
enabled. This is done by setting bit 6 of the control register (N+4) equal to “1”.
When interrupted, first the interrupt routine must verify that the interrupt originated from the
DMC-1600 controller. This is done by checking that the IRQ enable and IRQ status bits (bit 5 and
6 of N+4) are high. The Status Byte can then be read by reading the IRQ register at N+8. The
returned Status Byte indicates what event generated the interrupt (for more information on specific
interrupt events, see the EI and UI commands in the Command Reference or the previous section
“Controller Event Interrupts…” in this chapter).
Once the Status Byte has been read, the interrupt must be cleared by writing a “1” to bit-5 of N+4.
Note: to preserve values of other bits, the interrupt service routine should read N+4 and write this
value back to N+4 to clear the interrupt.
Resetting the PC-to-DMC FIFO
- To reset the output FIFO, write data to address N+8 where bit
2 is high and all other bits are low.
Resetting the DMC-to-PC FIFO
- To reset the input FIFO, write data to address N+8 where bit 1
is high and all other bits are low.
Resetting the Controller
- Clearing the FIFO is useful for emergency resets or Abort. For
example, to reset the controller, clear the FIFO, then send the RS command. If the controller is not
responding, it may be necessary to provide a hardware reset to the controller. This can be
accomplished by writing data to address N+8 where bit 7 is high.
Reset Register at N+8
Status Bit
Purpose
Logic State
Meaning
7 WRITE
1
Reset
Controller
2
WRITE
1
Reset PC_to_DMC FIFO
1
WRITE
1
Reset DMC_to_PC FIFO
Secondary FIFO Memory Map
ADDR TYPE ITEM
00-01 UW sample
number
02
UB
general input block 0 (inputs 1-8)
03
UB
general input block 1 (inputs 9-16)
04
UB
general input block 2 (inputs 17-24)
05
UB
general input block 3 (inputs 25-32)
06
UB
general input block 4 (inputs 33-40)
07
UB
general input block 5 (inputs 41-48)
08
UB
general input block 6 (inputs 49-56)
09
UB
general input block 7 (inputs 57-64)
10
UB
general input block 8 (inputs 65-72)
11
UB
general input block 9 (inputs 73-80)
12
UB
general output block 0 (outputs 1-8)
13
UB
general output block 1 (outputs 9-16)
14
UB
general output block 2 (outputs 17-24)
15
UB
general output block 3 (outputs 25-32)
DMC-1600
Chapter 4 - Software Tools and Communications
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