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HARDWARE CONFIGURATION
2-47
8-Bit PWM TIMER
(TIMER 1)
•
When COMR
00
H
Counter value
00
H
⋅ ⋅ ⋅ ⋅ ⋅ ⋅ →→→→→→→
⋅ ⋅ ⋅ ⋅ ⋅ ⋅
FF
H
00
H
PWM pulse output
•
When COMR
80
H
PWM pulse output
Counter value
00
H
⋅ ⋅ →⋅ ⋅ ⋅
80
H
⋅ ⋅ ⋅ →⋅ ⋅ ⋅
FF
H
00
H
⋅ ⋅ →⋅ ⋅ ⋅
80
H
•
When COMR
FF
H
PWM pulse output
00
H
⋅ ⋅ ⋅→→→⋅ ⋅ ⋅
80
H
⋅ ⋅ ⋅ ⋅→⋅ ⋅ ⋅
FF
H
00
H
Counter value
Fig. 2.24 PWM Pulse Output
The TIR bit of the CNTR in the PWM operation mode has no meaning. No
interrupt occurs irrespective of TIE bit.
The cycle and frequency of the PWM pulse can be changed by switching the
count clock pulse. The count clock pulse can be selected from four clock
pulses from the prescaler (PWM timer channel 1 output) by the clock pulse
select pits P0 and P1 of the CNTR.
Summary of Contents for F2MC-8L Series
Page 121: ...INSTRUCTIONS 4 7 4 5 F2MC 8L FAMILY INSTRUCTION MAP ...
Page 123: ...5 MASK OPTIONS ...
Page 125: ...APPENDIX ...