Fujitsu F2MC-8L Series, Hardware Manual, Page: 46 / 131

HARDWARE CONFIGURATION
2-26
I/O PORTS
Register list
I/O port consists of the following registers.
Table 2-5 Port register
Ports 00 to 07 data register (PDR0) R/W 0000
H
XXXXXXXX
B
Ports 00 to 07 data direction register (DDR0) W 0001
H
00000000
B
Ports 10 to 17 data register (PDR1) R/W 0002
H
XXXXXXXX
B
Ports 10 to 17 data direction register (DDR1) W 0003
H
00000000
B
Ports 20 to 27 data register (PDR2) R/W 0004
H
----0000
B
Reserve 0005
H
Ports 30 to 37 data register (PDR3) R/W 000C
H
XXXXXXXX
B
Ports 30 to 37 data direction register (DDR3) W 000D
H
00000000
B
Ports 40 to 47 data register (PDR4) R/W 0010
H
00000000
B
Ports 50 to 57 data register (PDR5) R/W 0011
H
00000000
B
Ports 60 to 67 data register (PDR6) R/W 0012
H
00000000
B
Ports 70 to 77 data register (PDR7) R 0013
H
------XX
B
Register name
read/
write
Address
Initial val-
ue
Port control register (PCR0, PCR1)
Address: 0022
H
Address: 0023
H
PCR0
PCR1
8 bit
W Port control register 1
W Port control register 2
•
Port control register (PCR0, PCR1)
Address: 0022
H
Address: 0023
H
Address: 0022
H
Address: 0023
H
Initial value
00000000
B
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
P07 P06 P05 P04 P03 P02 P01 P00
(W) (W) (W) (W) (W) (W) (W) (W)
— — — — P13 P12 P11 P10
(W) (W) (W) (W)
PCR0
PCR1
Initial value
----0000
B