Freescale Semiconductor SC140 DSP Core, Reference Manual

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Address Generation Unit
SC140 DSP Core Reference Manual 2-53
Integer moves from memory (byte, word, long, two long) are right-aligned in the destination register, and
by default are sign-extended to the left. Unsigned moves are marked with “U” (for example, MOVEU.B),
and zero extended in the destination register. A schematic representation of integer moves from memory
into a 40-bit register is shown in Figure 2-16. Moves from registers to memory use the appropriate portion
from the source register. Moves to registers of less than 40 bits behave the same as in Figure 2-16 up to
their bit length.
Figure 2-16. Integer Move Instructions
Fractional moves are supported only to DALU registers. Moves from memory are put in the high portion
of the data register, sign-extended to the extension, and zero-filled in the low portion. MOVE.L and
MOVE.2L may also be considered fractional moves since alignment in the destination register is the same
for integer long moves and fractional long moves. A schematic representation of fractional moves from
memory to 40-bit data registers is shown in Figure 2-17.
0 39 8
MOVE.B (signed byte move)
sign extension
0 39 8
MOVEU.B (unsigned byte move)
zero extension
0 39 16
MOVE.W (signed word move)
sign extension
0 39 32
MOVE.L (signed long move)
sign
extension
0 39 32
MOVEU.L (unsigned long move)
zero
extension
MOVE.2L (signed two long move)
0 39 16
MOVE.2W (signed two word move)
sign extension
sign extension
0 39 32
sign
extension
sign
extension
0 39 16
sign extension
sign extension
sign extension
sign extension
MOVE.4W (signed four-word move)
0 39 16
MOVEU.W (unsigned word move)
zero extension