Z8OQT
2.
Insert the modified IC socket into the self test socket.
3.
Insert the
ribbon
cable
connector into
the modified IC socket.
In
addition to
effectively modifying the
ribbon
cable connector, be sure to
disable all
forcing
line and
interrupt inputs,
and set all forcing line and
interrupt
traps to
NO
during
setup editing as described in the mainframe manual.
Disabling these inputs and messages
is
necessary when utilizing the self test
socket since all lines are wired to the active state.
5-8.
Troubleshooting
a
Defective Pod
NOTE
Thefollowingparagraphs
reference three distinct areas
of
the
pod
identified
as the
Processor
Section, the UU
Tlnterface
Section,
and
the Timing Circuits. The
components
which make up these sections
are identified in the Theory
of
Operation,
presented
in
Section
4.
A
pod
is
considered
defective when it fails a self test. Pod faults are summarized
in Table 5-1.
For
more
detailed
self
testingerror
analysis, refer to Table
5-3.
The
fact
that
a self test can be performed indicates
operation
of the Processor
Section, since
operation
of the Processor Section
is
necessary for mainframe/ pod
communication.
With the
Processor
Section proven
to
be good, the UUT
Interface Section or the Timing Circuits
contain
the fault.
Prepare to troubleshoot
the defective pod as follows:
1.
Disassemble the pod by removing the PCB assemblies from the case,
and
the shield
from
the PCB assemblies. (Refer to disassembly
informa-
tion under
the heading Disassembly.) It
is
not necessary to separate the
PCB assemblies at this point.
2.
Connect
the pod to the mainframe, and the ribbon cable
connector
to
the UUT, as shown in Figure
5—2.
Note
that
the mainframe
is
connected by
means of the shielded cable, and
not
by means of a second pod connected
to the
microprocessor
socket. Also, Figure
5-2
shows the self test socket
as
the UUT,
although
any suitable UUT may be used. (Refer to Selecting a
UUT for
Pod
Testing.)
NOTE
All
references to
data and addresses
in the
following
trouble-
shooting
guide are in
hexadecimal notation.
Unless otherwise
noted, all mainframe probe operations are performed
in
the
synchronized
mode.
Summary of Contents for 9000A-Z80QT
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Page 18: ...ZBOQT Figure 2 3 Connection 0 Interface Pod to UUT...
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Page 76: ...Z8OQT MP10 H 2 9000A Z8OQT 5071 Figure 6 1 9000A 2800T Intertace Pod Final Assembly...
Page 84: ...Z8OQT E 3 mwmdwwwwmi o a u n v u 2 as MLVLSI IQ 23333329...
Page 85: ...ZBOQT QLVLSNXVI 9 Figure 7 1 A11 Processor PCB Assembly...
Page 89: ...ZBOQT DEVICE 6ND PINS 14 Figure 7 1 A11 Processor PCB Assembly cont 7 7...
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