Z8OQT
3-3.
STATUS/CONTROL LINES AND ADDRESS SPACE ASSIGNMENT
3-4.
Introduction
The
9000
Series and 9100 Series mainframes accommodate bus-oriented
processors having up to
32
address lines,
32
data
lines,
16
status lines, and
8
control
lines. The pod provides an interface between the general architecture of
the mainframe and the specific requirements
ofthe
Z80 microprocessor.
As
part
of this interface
task,
the pod makes specific assignments between the
microprocessor lines and the mainframe. These assignments include the
following:
0
Bit
number
assignment of Z80 status lines
0
User-writable
control
lines
0
Bit
number
assignment of
control
lines
0
Address space assignment
0
Pin assignments
These assignments are described in the following paragraphs and are summarized
for convenience on the pod decal.
3-5.
Bit
Assignment
-
Status Lines
When a read
status operation
is
performed.
the mainframe displays the result in
binary form, where a
1
indicates a logic high status line and a
0
indicates a logic
low status line.
To
determine which characters of the display correspond to
specific status lines, refer
to
Table
3—2.
This table shows
that
each line
is
assigned
a bit number. Bit
number
zero (WAIT)
appears
at the far right of the display,
while bit
number
7
(POWER FAIL)
appears at the far left
side.
For
example,
inhem
(bit
number
2)
and
POWER FAIL(bit
number
7)
lines
are low, and all
other
status lines are high, a 9000 Series mainframe would read
READ
@
STS
=
0001 1011
OK. Bit numbers
2
(W)
and
7
(POWER
FAIL) are
zero to indicate a logic low, while
other
meaningful bits are ones to indicate logic
high. Bits
5
and
6,
which have no
meaning
as Z80 status lines, are always
represented by zeros in the mainframe display message.
3-6.
User-WritableControl
Lines
The
280
has two
control
lines
to
which the
mainframe
can write. These lines are
bus acknowledge (BUSAK) and
halt
(HALT).
To
write to either or
both
of these
lines, a
control function
is
used as described in the
paragraphsthat
follow. Note
that
writing
to
a
control
line only sets the line
to
the high or low state for
approximately
20
microseconds,just
long enough to verify
that
it can
be
driven.
3-4
Summary of Contents for 9000A-Z80QT
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