FLIR
LEPTON® Engineering Datasheet
The information contained herein does not contain technology as defined by the EAR, 15 CFR 772, is publicly available,
and therefore, not subject to EAR. NSR (6/14/2018).
Information on this page is subject to change without notice.
Lepton Engineering Datasheet, Document Number: 500-0659-00-09 Rev: 203
76
9.2
DC and Logic Level Specifications
Table 16 - DC and Logic Levels
Symbol
Parameter
Min
Typ
Max
Units
VDDC
Core Voltage (primary power for
the Lepton internal ASIC)
1.14 1.20
1.26
Volts
VDDC
pp
VDDC, peak-to-peak ripple voltage
—
—
50
mV
VDD
Sensor Voltage (primary power
for the Lepton internal sensor
chip)
2.72 2.80
2.88
Volts
VDD
pp
VDD, peak-to-peak ripple voltage
—
—
30
mV
VDDIO
3
I/O Voltage (primary power for
the Lepton I/O ring)
2.8
—
3.1
Volts
VDDIO
pp
VDDIO, peak-to-peak ripple
voltage
—
—
50
mV
I_DDC
Supply current for core (VDDC)
76
84
110
mA
I_DD
Supply current for sensor (VDD)
12
14
16
1
mA
I_DDIO
Supply current for I/O ring
and shutter assembly (VDDIO)
1
235 mA
(during FFC)
310 mA
2
(during FFC)
mA
Note(s)
1.
Maximum measured at 65 degrees C
2.
Maximum at -10 degrees C
3.
FLIR recommends utilizing two separate power supplies rather than a common supply for VDD and VDDIO due to noise
considerations.
