FLIR Lepton 1.5, Engineering Data Sheet

Page: 74 / 84

FLIR LEPTON® Engineering Datasheet
The information contained herein does not contain technology as defined by the EAR, 15 CFR 772, is publicly available,
and therefore, not subject to EAR. NSR (6/14/2018).
Information on this page is subject to change without notice.
Lepton Engineering Datasheet, Document Number: 500-0659-00-09 Rev: 203
74
Table 14 - Lepton Camera Module Pin Descriptions
Pin # Pin Name
Signal
Type
Signal Level Description
1, 6, 8,
9, 10,
15, 18,
20, 25,
27, 30
GND Power GND Common Ground
2 GPIO3/VSYNC IN/OUT
VDDIO
Video output synchronization (see GPIO
Modes page 39 )
3 GPIO2 IN/OUT
VDDIO
Reserved
4 GPIO1 IN/OUT
VDDIO
Reserved
5 GPIO0 IN/OUT
VDDIO
Reserved
7 VDDC Power 1.2V Supply for MIPI Core, PLL, ASIC Core (1.2V
+/- 5%)
11 SPI_MOSI IN VDDIO Video Over SPI Slave Data In (see VoSPI
Channel page 44 )
12 SPI_MISO OUT VDDIO Video Over SPI Slave Data Out (see VoSPI
Channel page 44 )
13 SPI_CLK IN VDDIO Video Over SPI Slave Clock (see VoSPI
Channel page 44 )
14 SPI_CS_L IN VDDIO Video Over SPI Slave Chip Select, active low
(see
VoSPI Channel page 44 )