CPC1302 User Manual
0-29
Description of operation of CPC1302 major components
CPC1302
Status Register
Base+6h
Bit
Name
Description
7:3
-
Reserved
2
STF
Write/Read:
Second timeout flag Is set to "1" provided that the timer's
counter was reset to zero for the second time, the counter
stops. In case the board reset RSTE=1 is allowed, the
hardware reset will be carried out. The reset is carried out
by writing any number to the registers of the current value.
1
-
Reserved
0
TMF
Write/Read:
Timeout flag. Installed into "1" when resetting the timer
counter. An interrupt is generated over this flag. The reset
is carried out by writing any number to the registers of the
current value.
Control Register
Base+7h
Bit
Name
Description
7:3
-
Reserved
2
INTM
Write/Read
1
– interrupt is on
0
– interrupt is off
1
CNTE
Write/Read: Counter
1 decrement is ON
0
– switched off
0
RSTE
Write/Read:
Board reset on timeout 1
–
Reset is permitted
0
– Reset is prohibited
2.9
I2C Controllers/ input-output ports
Controller I2C supports the "Master" mode and transfer frequency of 100 KHz. Base address
in the field of I/O, installed by BIOS is specified in the section "help", to the right of the item
dedicated to I2C controller activation/ deactivation.
Register GPIO (BASE+3) enables to read and set input-output signals GPI[3:0], GPO[3:0],
routed to the COM Express connector.