60
D
IRECT FROM THE
S
ENSOR
-M
EMORY
O
PTIONS
[2:0]
=
0
Sensor data is written continuously to memory with each frame overwriting the previous
frame at memory location zero. If preview bit is enabled, readout to the USB runs
continuously at the maximum rate of the USB port with no attempt to synchronize to the
incoming frame rate. Use this mode for alignment and focus.
FIFO
M
EMORY
M
ODE
–
M
EMORY
O
PTIONS
[2:0]
=
1
Sensor data is written to memory starting at address zero when the memory is reset by the
Z command. If preview bit is enabled, readout to the USB is sequential from location zero;
pausing if the readout catches up to the write pointer. Writing is permanently disabled until
the next Z command if the write pointer reaches the read pointer (or if it wraps to zero if
preview is disabled).
C
IRCULAR
B
UFFER
M
EMORY
M
ODE
–
M
EMORY
O
PTIONS
[2:0]
=
2
This is the most flexible mode for capture of short-lived high-speed events. Sensor data is
written to memory when enabled by sending the “Reset Memory” (Z) command. Writing to
memory continues in a circular buffer until a trigger is received. Following the receipt of
trigger the writing continues for up to 65535 frames as defined by the Post-Trigger Frames
register. Writing will not continue until re-enabled with another Z command.
If preview bit is enabled, readout to the USB is from the most recent frame as in Direct
Mode. Otherwise, reading only occurs when requested with the “Readout Memory” (Y)
command. Readout in this mode is random access, allowing re-read when USB
bandwidth is not available.
Details of Implementation:
S
TORAGE
F
ORMAT
Each memory word has 118 usable bits. The low 100 data bits (bits 99:0) represent 10 10-
bit pixels as received from the data FPGA (in this version directly from the sensor without
binning). Bit 100 is Frame Valid. Bit 101 is Line Valid. Bit 102 is Data Valid (always 1).
Data is stored when Frame Valid and Line Valid are both 1, or when either of these signals
first becomes 0. This provides the framing required for continuous readout.
At the beginning of each frame, a word is inserted with the data bits replaced with frame
identification as follows. Bits 31:0 are the frame number as reported by the H command.
This increments with each exposure from the time the camera is turned on. Bits 63:32 are
the time in microseconds at the end of the frame's exposure as recorded in the control
FPGA. This time starts at 0 when the FPGA is loaded and wraps back to 0 about every
71.5 minutes. Bit 96 is 1 if a trigger event occurred between the end of the previous
exposure and the end of this one. All of this information is transmitted by the control FPGA
