59
Bit 1 Invert CC2. Setting this bit to 1 indicates the CC2 input is active on falling edge.
Setting this bit to 0 indicates the CC2 input is active on rising edge.
Bit 0 Enable Camera Link CC2. Set this bit to 1 to enable CC2 Readout Image. When
enabled, the active edge of CC2 causes the current memory image to be read out.
D
ATA
FPGA
This version of the data FPGA is very simplified compared to other version of the camera.
It provides for basically two functions. Raw Data is passed from the sensor to the DDR
FPGA untouched.
Data coming back from the DDR FPGA is sent to the USB port, and the camera link port.
These two ports get essentially the same data. The image format is fixed for these two
ports; it is 642 by 482 eight bit pixels.
None of the other features (such as binning) of the data FPGA are supported. The camera
can essentially take images, pass them to the USB and the camera link, for preview, and
then record programmable image sizes and produce 16 bit TIFF files from the recording.
More features may come later, and as the Data FPGA can be programmed in the field via
the serial port or USB, the camera can be updated in the field.
DDR FPGA
R
EVISION
1.0
LIMITATIONS
:
This revision of the Memory FPGA only implements memory in the storage and playback
modes. Future FPGA revisions may add frame averaging, image scaling, and look-up
table modes.
Data from the data FPGA to the memory FPGA runs at the sensor bandwidth, but data
from the memory FPGA back to the data FPGA only runs at the USB output bandwidth.
Memory is clocked at 100 MHz (200 Mbit DDR), instead of 133 MHz.
Recording Modes
Three modes are defined by the Control FPGA specification as “Direct from the Sensor,”
“FIFO Memory Mode,” and “Circular Buffer Memory Mode” with values of 0, 1, and 2
respectively in the Memory Options register (now at offset 63). Only the low three bits of
this register select the mode. Bit 3 of the Memory Options register is defined as the
preview bit, when set the camera outputs to USB the last frame written to memory. Bit 4 of
the Memory Options register when set (bit 3 must be zero), causes the camera to output
the first frame found after the address selected by the Y command. This is used in the
VCR function of the software. The mode bits are implemented as follows:
