M
ODEL
SL900A V
ERSION
V_1.0
P
REPARED BY
H/W
D
ATE
2006.06.30
S
UBJECT
T
ECHNICAL
M
ANUAL
P
AGE
13/51
SL900A
T
ECHNICAL
M
ANUAL
-. Analog Supplies
3.
Micro-Controller Unit Subsystem
Figure 6 illustrates the block diagram of the Micro-Controller Unit Subsystem in MT6226M. The
Subsystem utilizes a main 32-bit ARM7EJ-S RISC processor, which plays the role of the main bus master
controlling the whole subsystem. The processor communicates with all the other on-chip modules via the
two-level system buses: AHB Bus and APB Bus. All bus transactions originate from bus masters, while
salves can only respond to requests from bus masters. Before data transfer can be established, bus master
must ask for bus ownership. This is accomplished by request-grant handshaking protocol between masters
and arbiters.
Figure 6. Block Diagram of MCU in MT6226M
Summary of Contents for SL900A
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