Instruction List (4)
S1C63000 Core CPU
Opcode
ADC
ADC
ADC
ADC
SUB
SUB
Operand
%A,%A
%A,%B
%A,imm4
%A,[%X]
%A,[%X]+
%A,[%Y]
%A,[%Y]+
%B,%A
%B,%B
%B,imm4
%B,[%X]
%B,[%X]+
%B,[%Y]
%B,[%Y]+
[%X],%A
[%X],%B
[%X],imm4
[%X]+,%A
[%X]+,%B
[%X]+,imm4
[%Y],%A
[%Y],%B
[%Y],imm4
[%Y]+,%A
[%Y]+,%B
[%Y]+,imm4
%A,%A
%A,%B
%A,imm4
%A,[%X]
%A,[%X]+
%A,[%Y]
%A,[%Y]+
%B,%A
%B,%B
%B,imm4
Basic function
A
←
A+A+C
A
←
A+B+C
A
←
A+imm4+C
A
←
A+[X]+C
A
←
A+[X]+C, X
←
X+1
A
←
A+[Y]+C
A
←
A+[Y]+C, Y
←
Y+1
B
←
B+A+C
B
←
B+B+C
B
←
B+imm4+C
B
←
B+[X]+C
B
←
B+[X]+C, X
←
X+1
B
←
B+[Y]+C
B
←
B+[Y]+C, Y
←
Y+1
[X]
←
[X]+A+C
[X]
←
[X]+B+C
[X]
←
[X]+imm4+C
[X]
←
[X]+A+C, X
←
X+1
[X]
←
[X]+B+C, X
←
X+1
[X]
←
[X]+imm4+C, X
←
X+1
[Y]
←
[Y]+A+C
[Y]
←
[Y]+B+C
[Y]
←
[Y]+imm4+C
[Y]
←
[Y]+A+C, Y
←
Y+1
[Y]
←
[Y]+B+C, Y
←
Y+1
[Y]
←
[Y]+imm4+C, Y
←
Y+1
A
←
A-A
A
←
A-B
A
←
A-imm4
A
←
A-[X]
A
←
A-[X], X
←
X+1
A
←
A-[Y]
A
←
A-[Y], Y
←
Y+1
B
←
B-A
B
←
B-A
B
←
B-imm4
Extended function
(when "LDB %EXT, imm8" is executed)
–
–
–
A
←
A+[C
–
A
←
A+[C
–
–
–
–
B
←
B+[C
–
B
←
B+[C
–
[00imm8]
←
[A+C
[00imm8]
←
[B+C
[00imm8]
←
[imm4+C
–
–
–
[FFimm8]
←
[A+C
[FFimm8]
←
[B+C
[FFimm8]
←
[imm4+C
–
–
–
–
–
–
A
←
A-[00imm8]
–
A
←
A-[FFimm8]
–
–
–
–
Symbol
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Clk
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
1
1
C
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
Z
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
↔
E
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
I
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Mnemonic
Classification
Arithmetic
operation
Flags
Remarks
Summary of Contents for S5U1C63000A
Page 4: ......
Page 14: ......
Page 304: ......
Page 305: ...S1C63 Family Assembler Package Quick Reference ...