Epson S1D16000 Series, Technical Manual

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S1D16702 Series
Rev.1.0
EPSON
5–3
Number
of pins
Pin name
COM0 to
COM67
DIO1,
DIO2
YSCL
SHL
DOFF
INH
FR
V
DD
, V
SS
V
0
, V
1
,
V
4
, V
5
I/O
O
I/O
I
I
I
I
I
Power supply
Power supply
SHL COM output shift direction DIO1 DIO2
LOW 0
→
67 Input Output
HIGH 67
→
0 Ourput Input
Function
LCD drive common (row) output
The output changes at the YSCL falling edge.
100-bit shift register serial data input/output
To be set to input or output according to the SHL input
The output changes at the YSCL falling edge.
Serial data shift clock input
The scanning data is shifted at the falling edge.
Display data latch pulse input (Falling edge trigger)
Shift direction selection and DIO pin I/O control input
LCD display blanking control input when LOW is input, the
content of shift register is cleared and all common outputs
become the non-select level instantaneously. (S1D16702
*
01
**
)
LCD display blanking control input
When LOW is input, the content of shift register is cleared and all
common outputs become the non-select level instantaneously.
Common output = V
4
(when FR = LOW)
Common output = V
1
(when FR = HIGH) (S1D16702 * 00 ** )
LCD drive output AC converted signal input
Logic power supply V
DD
: 0 V (GND) V
SS
: –5.0 V
LCD drive power supply V
5
: –7 V to –28 V
V
DD
≥
V
0
≥
V
1
>V
4
≥
V
5
68
2
1
1
1
(1)
1
2
4
INH
in S1D16702 * 00 **
DOFF
in S1D16702
*
01
**
4. PIN DESCRIPTION
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