Epson S1D16000 Series, Technical Manual

Page: 30 / 86

S1D16400 Series
2–6
EPSON
Data bus
DSPOFF
FR O Output Voltage
signals
HIGH V
0
HIGH
LOW V
5
HIGH
HIGH V
2
LOW
LOW V
3
LOW — — V
0
7. FUNCTION DESCRIPTIONS
Inable shift registor
The inable shift registor is a bidirectional shift registor wherewith the shift direction is determined by the SHL
inputs and outputs of such shift registor are used to store data bus signals to the data registor. When inable
signals are in the disable state, the internal clock signal and data bus are fixed to LOW to become the power
save mode.
When using multiple units of the segment driver, EIO terminals of each driver should be connected by the
cascade connection and the EIO terminals of the top end driver should be connected to “V
DD
”. (Refer to the
example of the connection) Since the inable control circuit automatically detects when all the 80 bit data are
taken in and automatically transfers the inable signal, control signals from a controlling LSI are not needed.
Data registor
This is a registor for serial and parallel conversion of data bus signals by means of the inable shift registor
output. Consequently, the relations between the serial display data and segment outputs are determined
independent from the shift clock input number.
Latch
It takes in the contents of the data registor by means of the trailing edge trigger of the LP to transmit the output
to the level shifter.
Level shifter
This is a level interface circuit to convert the voltage level of signals from logic level to LCD driving level.
LCD driver
It outputs the LCD drive voltage.
Relations among data bus signals, alternating signals FR and the segment output voltage are given below.
www.DataSheet4U.com